摘要
DSP program's running efficiency on board is often lower than which via the software simulation during the program development, which is mainly resulted from the user's improper use and incomplete understanding of the cache-based memory. This paper took the TI TMS320C6455 DSP as an example, analyzed its two-level internal cache, and summarized the methods of code optimization. Processor can achieve its best performance when using these code optimization methods. At last, a specific algorithm application in radar signal processing is proposed. Experiment result shows that these optimization are efficient.
| 源语言 | 英语 |
|---|---|
| 主期刊名 | International Conference on Graphic and Image Processing, ICGIP 2012 |
| DOI | |
| 出版状态 | 已出版 - 2013 |
| 活动 | 4th International Conference on Graphic and Image Processing, ICGIP 2012 - Singapore, 新加坡 期限: 6 10月 2012 → 7 10月 2012 |
出版系列
| 姓名 | Proceedings of SPIE - The International Society for Optical Engineering |
|---|---|
| 卷 | 8768 |
| ISSN（印刷版） | 0277-786X |
| ISSN（电子版） | 1996-756X |
会议
| 会议 | 4th International Conference on Graphic and Image Processing, ICGIP 2012 |
|---|---|
| 国家/地区 | 新加坡 |
| 市 | Singapore |
| 时期 | 6/10/12 → 7/10/12 |
指纹
探究 'DSP Code optimization based on cache' 的科研主题。它们共同构成独一无二的指纹。引用此
Xu, C., Li, C., & Tang, B. (2013). DSP Code optimization based on cache. 在 International Conference on Graphic and Image Processing, ICGIP 2012 文章 87682Q (Proceedings of SPIE - The International Society for Optical Engineering; 卷 8768). https://doi.org/10.1117/12.2010893