Efficient Barrett Modular Multiplication Based on Toom-Cook Multiplication

Yue Hao; Weijiang Wang; Hua Dang; Guiyu Wang

doi:10.1109/TCSII.2023.3313783

Efficient Barrett Modular Multiplication Based on Toom-Cook Multiplication

Yue Hao, Weijiang Wang, Hua Dang, Guiyu Wang^*

^*Corresponding author for this work

School of Integrated Circuits and Electronics

Research output: Contribution to journal › Article › peer-review

2 Citations (Scopus)

Abstract

The Toom-Cook multiplier (TCM) is the most suitable method for multiplying large integers with key widths typically employed in ECC or RSA due to its computational efficiency. In this brief, we improve the accuracy of hardware TCM algorithm, and propose a TCM-based Barrett modular multiplication algorithm. We provide detailed mathematical proofs for the determination of parameters, error ranges, and input-output bounds, which serve to validate the robustness and reliability of our proposed algorithm. Further, the hardware architecture and the ASIC implementation results under 40nm, 65nm, 90nm process are presented. Compared with existing works, the proposed modular multiplier exhibits superior performance in terms of Area-Time-Product.

Original language	English
Pages (from-to)	862-866
Number of pages	5
Journal	IEEE Transactions on Circuits and Systems II: Express Briefs
Volume	71
Issue number	2
DOIs	https://doi.org/10.1109/TCSII.2023.3313783
Publication status	Published - 1 Feb 2024

Keywords

ASIC implementation
Barrett modular multiplication
Modular multiplier
Toom-Cook multiplication
precompute

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10.1109/TCSII.2023.3313783

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@article{cfaf05fb411c407d9a199922357dfd3d,

title = "Efficient Barrett Modular Multiplication Based on Toom-Cook Multiplication",

abstract = "The Toom-Cook multiplier (TCM) is the most suitable method for multiplying large integers with key widths typically employed in ECC or RSA due to its computational efficiency. In this brief, we improve the accuracy of hardware TCM algorithm, and propose a TCM-based Barrett modular multiplication algorithm. We provide detailed mathematical proofs for the determination of parameters, error ranges, and input-output bounds, which serve to validate the robustness and reliability of our proposed algorithm. Further, the hardware architecture and the ASIC implementation results under 40nm, 65nm, 90nm process are presented. Compared with existing works, the proposed modular multiplier exhibits superior performance in terms of Area-Time-Product.",

keywords = "ASIC implementation, Barrett modular multiplication, Modular multiplier, Toom-Cook multiplication, precompute",

author = "Yue Hao and Weijiang Wang and Hua Dang and Guiyu Wang",

note = "Publisher Copyright: {\textcopyright} 2004-2012 IEEE.",

year = "2024",

month = feb,

day = "1",

doi = "10.1109/TCSII.2023.3313783",

language = "English",

volume = "71",

pages = "862--866",

journal = "IEEE Transactions on Circuits and Systems II: Express Briefs",

issn = "1549-7747",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "2",

}

TY - JOUR

T1 - Efficient Barrett Modular Multiplication Based on Toom-Cook Multiplication

AU - Hao, Yue

AU - Wang, Weijiang

AU - Dang, Hua

AU - Wang, Guiyu

PY - 2024/2/1

Y1 - 2024/2/1

N2 - The Toom-Cook multiplier (TCM) is the most suitable method for multiplying large integers with key widths typically employed in ECC or RSA due to its computational efficiency. In this brief, we improve the accuracy of hardware TCM algorithm, and propose a TCM-based Barrett modular multiplication algorithm. We provide detailed mathematical proofs for the determination of parameters, error ranges, and input-output bounds, which serve to validate the robustness and reliability of our proposed algorithm. Further, the hardware architecture and the ASIC implementation results under 40nm, 65nm, 90nm process are presented. Compared with existing works, the proposed modular multiplier exhibits superior performance in terms of Area-Time-Product.

AB - The Toom-Cook multiplier (TCM) is the most suitable method for multiplying large integers with key widths typically employed in ECC or RSA due to its computational efficiency. In this brief, we improve the accuracy of hardware TCM algorithm, and propose a TCM-based Barrett modular multiplication algorithm. We provide detailed mathematical proofs for the determination of parameters, error ranges, and input-output bounds, which serve to validate the robustness and reliability of our proposed algorithm. Further, the hardware architecture and the ASIC implementation results under 40nm, 65nm, 90nm process are presented. Compared with existing works, the proposed modular multiplier exhibits superior performance in terms of Area-Time-Product.

KW - ASIC implementation

KW - Barrett modular multiplication

KW - Modular multiplier

KW - Toom-Cook multiplication

KW - precompute

UR - http://www.scopus.com/inward/record.url?scp=85171735090&partnerID=8YFLogxK

U2 - 10.1109/TCSII.2023.3313783

DO - 10.1109/TCSII.2023.3313783

M3 - Article

AN - SCOPUS:85171735090

SN - 1549-7747

VL - 71

SP - 862

EP - 866

JO - IEEE Transactions on Circuits and Systems II: Express Briefs

JF - IEEE Transactions on Circuits and Systems II: Express Briefs

IS - 2

ER -

Efficient Barrett Modular Multiplication Based on Toom-Cook Multiplication

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