FPGA Verification of Radar Signal Processing Based on SoC

Xiaoying Chen; Xinghua Wang; Ying Liu; Zicheng Liu; Jian An

doi:10.1109/ICSIDP47821.2019.9172898

FPGA Verification of Radar Signal Processing Based on SoC

Xiaoying Chen, Xinghua Wang, Ying Liu, Zicheng Liu, Jian An

集成电路与电子学院

科研成果: 书/报告/会议事项章节 › 会议稿件 › 同行评审

3 引用（Scopus）

摘要

Radar systems have been widely used in many fields, where real-time processing and re-configurability of the hardware system are in strong demand. This paper presents the prototype of a System-on-Chip (SoC) architecture of a reconfigurable, high performance, low cost and real-time Radar Signal Processing system. It integrates both the microprocessor and the Field-Programmable Gate Array (FPGA) into a single chip, which makes the system capable of allowing complex system configuration and performing high speed data processing. The proposed SoC system is highly reconfigurable so that the software and hardware configuration can be reconfigured as microprocessor or FPGA.

源语言	英语
主期刊名	ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019
出版商	Institute of Electrical and Electronics Engineers Inc.
ISBN（电子版）	9781728123455
DOI	https://doi.org/10.1109/ICSIDP47821.2019.9172898
出版状态	已出版 - 12月 2019
活动	2019 IEEE International Conference on Signal, Information and Data Processing, ICSIDP 2019 - Chongqing, 中国期限: 11 12月 2019 → 13 12月 2019

出版系列

姓名	ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019

会议

会议	2019 IEEE International Conference on Signal, Information and Data Processing, ICSIDP 2019
国家/地区	中国
市	Chongqing
时期	11/12/19 → 13/12/19

访问文件

10.1109/ICSIDP47821.2019.9172898

其它文件与链接

链接到 Scopus 的出版物

引用此

Chen, X., Wang, X., Liu, Y., Liu, Z., & An, J. (2019). FPGA Verification of Radar Signal Processing Based on SoC. 在 ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019 文章 9172898 (ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICSIDP47821.2019.9172898

@inproceedings{916821e2e64041ea907c728b745ba90d,

title = "FPGA Verification of Radar Signal Processing Based on SoC",

abstract = "Radar systems have been widely used in many fields, where real-time processing and re-configurability of the hardware system are in strong demand. This paper presents the prototype of a System-on-Chip (SoC) architecture of a reconfigurable, high performance, low cost and real-time Radar Signal Processing system. It integrates both the microprocessor and the Field-Programmable Gate Array (FPGA) into a single chip, which makes the system capable of allowing complex system configuration and performing high speed data processing. The proposed SoC system is highly reconfigurable so that the software and hardware configuration can be reconfigured as microprocessor or FPGA.",

keywords = "FPGA, Radar Signal Processing, SoC, System Architecture",

author = "Xiaoying Chen and Xinghua Wang and Ying Liu and Zicheng Liu and Jian An",

note = "Publisher Copyright: {\textcopyright} 2019 IEEE.; 2019 IEEE International Conference on Signal, Information and Data Processing, ICSIDP 2019 ; Conference date: 11-12-2019 Through 13-12-2019",

year = "2019",

month = dec,

doi = "10.1109/ICSIDP47821.2019.9172898",

language = "English",

series = "ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019",

address = "United States",

}

Chen, X, Wang, X, Liu, Y, Liu, Z & An, J 2019, FPGA Verification of Radar Signal Processing Based on SoC. 在 ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019., 9172898, ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019, Institute of Electrical and Electronics Engineers Inc., 2019 IEEE International Conference on Signal, Information and Data Processing, ICSIDP 2019, Chongqing, 中国, 11/12/19. https://doi.org/10.1109/ICSIDP47821.2019.9172898

FPGA Verification of Radar Signal Processing Based on SoC. / Chen, Xiaoying; Wang, Xinghua; Liu, Ying 等.
ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019. Institute of Electrical and Electronics Engineers Inc., 2019. 9172898 (ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019).

科研成果: 书/报告/会议事项章节 › 会议稿件 › 同行评审

TY - GEN

T1 - FPGA Verification of Radar Signal Processing Based on SoC

AU - Chen, Xiaoying

AU - Wang, Xinghua

AU - Liu, Ying

AU - Liu, Zicheng

AU - An, Jian

PY - 2019/12

Y1 - 2019/12

N2 - Radar systems have been widely used in many fields, where real-time processing and re-configurability of the hardware system are in strong demand. This paper presents the prototype of a System-on-Chip (SoC) architecture of a reconfigurable, high performance, low cost and real-time Radar Signal Processing system. It integrates both the microprocessor and the Field-Programmable Gate Array (FPGA) into a single chip, which makes the system capable of allowing complex system configuration and performing high speed data processing. The proposed SoC system is highly reconfigurable so that the software and hardware configuration can be reconfigured as microprocessor or FPGA.

AB - Radar systems have been widely used in many fields, where real-time processing and re-configurability of the hardware system are in strong demand. This paper presents the prototype of a System-on-Chip (SoC) architecture of a reconfigurable, high performance, low cost and real-time Radar Signal Processing system. It integrates both the microprocessor and the Field-Programmable Gate Array (FPGA) into a single chip, which makes the system capable of allowing complex system configuration and performing high speed data processing. The proposed SoC system is highly reconfigurable so that the software and hardware configuration can be reconfigured as microprocessor or FPGA.

KW - FPGA

KW - Radar Signal Processing

KW - SoC

KW - System Architecture

UR - http://www.scopus.com/inward/record.url?scp=85091923118&partnerID=8YFLogxK

U2 - 10.1109/ICSIDP47821.2019.9172898

DO - 10.1109/ICSIDP47821.2019.9172898

M3 - Conference contribution

AN - SCOPUS:85091923118

T3 - ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019

BT - ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2019 IEEE International Conference on Signal, Information and Data Processing, ICSIDP 2019

Y2 - 11 December 2019 through 13 December 2019

ER -

Chen X, Wang X, Liu Y, Liu Z, An J. FPGA Verification of Radar Signal Processing Based on SoC. 在 ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019. Institute of Electrical and Electronics Engineers Inc. 2019. 9172898. (ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019). doi: 10.1109/ICSIDP47821.2019.9172898

FPGA Verification of Radar Signal Processing Based on SoC

摘要

出版系列

会议

访问文件

其它文件与链接

指纹

引用此