FPGA Verification of Radar Signal Processing Based on SoC

Xiaoying Chen; Xinghua Wang; Ying Liu; Zicheng Liu; Jian An

doi:10.1109/ICSIDP47821.2019.9172898

FPGA Verification of Radar Signal Processing Based on SoC

Xiaoying Chen, Xinghua Wang, Ying Liu, Zicheng Liu, Jian An

School of Integrated Circuits and Electronics

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

3 Citations (Scopus)

Abstract

Radar systems have been widely used in many fields, where real-time processing and re-configurability of the hardware system are in strong demand. This paper presents the prototype of a System-on-Chip (SoC) architecture of a reconfigurable, high performance, low cost and real-time Radar Signal Processing system. It integrates both the microprocessor and the Field-Programmable Gate Array (FPGA) into a single chip, which makes the system capable of allowing complex system configuration and performing high speed data processing. The proposed SoC system is highly reconfigurable so that the software and hardware configuration can be reconfigured as microprocessor or FPGA.

Original language	English
Title of host publication	ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781728123455
DOIs	https://doi.org/10.1109/ICSIDP47821.2019.9172898
Publication status	Published - Dec 2019
Event	2019 IEEE International Conference on Signal, Information and Data Processing, ICSIDP 2019 - Chongqing, China Duration: 11 Dec 2019 → 13 Dec 2019

Publication series

Name	ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019

Conference

Conference	2019 IEEE International Conference on Signal, Information and Data Processing, ICSIDP 2019
Country/Territory	China
City	Chongqing
Period	11/12/19 → 13/12/19

Keywords

FPGA
Radar Signal Processing
SoC
System Architecture

Access to Document

10.1109/ICSIDP47821.2019.9172898

Cite this

Chen, X., Wang, X., Liu, Y., Liu, Z., & An, J. (2019). FPGA Verification of Radar Signal Processing Based on SoC. In ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019 Article 9172898 (ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICSIDP47821.2019.9172898

@inproceedings{916821e2e64041ea907c728b745ba90d,

title = "FPGA Verification of Radar Signal Processing Based on SoC",

abstract = "Radar systems have been widely used in many fields, where real-time processing and re-configurability of the hardware system are in strong demand. This paper presents the prototype of a System-on-Chip (SoC) architecture of a reconfigurable, high performance, low cost and real-time Radar Signal Processing system. It integrates both the microprocessor and the Field-Programmable Gate Array (FPGA) into a single chip, which makes the system capable of allowing complex system configuration and performing high speed data processing. The proposed SoC system is highly reconfigurable so that the software and hardware configuration can be reconfigured as microprocessor or FPGA.",

keywords = "FPGA, Radar Signal Processing, SoC, System Architecture",

author = "Xiaoying Chen and Xinghua Wang and Ying Liu and Zicheng Liu and Jian An",

note = "Publisher Copyright: {\textcopyright} 2019 IEEE.; 2019 IEEE International Conference on Signal, Information and Data Processing, ICSIDP 2019 ; Conference date: 11-12-2019 Through 13-12-2019",

year = "2019",

month = dec,

doi = "10.1109/ICSIDP47821.2019.9172898",

language = "English",

series = "ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019",

address = "United States",

}

Chen, X, Wang, X, Liu, Y, Liu, Z & An, J 2019, FPGA Verification of Radar Signal Processing Based on SoC. in ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019., 9172898, ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019, Institute of Electrical and Electronics Engineers Inc., 2019 IEEE International Conference on Signal, Information and Data Processing, ICSIDP 2019, Chongqing, China, 11/12/19. https://doi.org/10.1109/ICSIDP47821.2019.9172898

FPGA Verification of Radar Signal Processing Based on SoC. / Chen, Xiaoying; Wang, Xinghua; Liu, Ying et al.
ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019. Institute of Electrical and Electronics Engineers Inc., 2019. 9172898 (ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - FPGA Verification of Radar Signal Processing Based on SoC

AU - Chen, Xiaoying

AU - Wang, Xinghua

AU - Liu, Ying

AU - Liu, Zicheng

AU - An, Jian

PY - 2019/12

Y1 - 2019/12

N2 - Radar systems have been widely used in many fields, where real-time processing and re-configurability of the hardware system are in strong demand. This paper presents the prototype of a System-on-Chip (SoC) architecture of a reconfigurable, high performance, low cost and real-time Radar Signal Processing system. It integrates both the microprocessor and the Field-Programmable Gate Array (FPGA) into a single chip, which makes the system capable of allowing complex system configuration and performing high speed data processing. The proposed SoC system is highly reconfigurable so that the software and hardware configuration can be reconfigured as microprocessor or FPGA.

AB - Radar systems have been widely used in many fields, where real-time processing and re-configurability of the hardware system are in strong demand. This paper presents the prototype of a System-on-Chip (SoC) architecture of a reconfigurable, high performance, low cost and real-time Radar Signal Processing system. It integrates both the microprocessor and the Field-Programmable Gate Array (FPGA) into a single chip, which makes the system capable of allowing complex system configuration and performing high speed data processing. The proposed SoC system is highly reconfigurable so that the software and hardware configuration can be reconfigured as microprocessor or FPGA.

KW - FPGA

KW - Radar Signal Processing

KW - SoC

KW - System Architecture

UR - http://www.scopus.com/inward/record.url?scp=85091923118&partnerID=8YFLogxK

U2 - 10.1109/ICSIDP47821.2019.9172898

DO - 10.1109/ICSIDP47821.2019.9172898

M3 - Conference contribution

AN - SCOPUS:85091923118

T3 - ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019

BT - ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2019 IEEE International Conference on Signal, Information and Data Processing, ICSIDP 2019

Y2 - 11 December 2019 through 13 December 2019

ER -

Chen X, Wang X, Liu Y, Liu Z, An J. FPGA Verification of Radar Signal Processing Based on SoC. In ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019. Institute of Electrical and Electronics Engineers Inc. 2019. 9172898. (ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019). doi: 10.1109/ICSIDP47821.2019.9172898

FPGA Verification of Radar Signal Processing Based on SoC

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