Design of real-time convolution processor and its application in radar echo signal simulator

Wang Zongbo*, Gao Meiguo, Fu Xiongjun, Jiang Changyong

*此作品的通讯作者

科研成果: 书/报告/会议事项章节会议稿件同行评审

6 引用 (Scopus)

摘要

An approach of implementing time-domain realtime convolution processor into multi-chip FPGA hardware platform is stated and the application of the convolution processor in radar echo signal simulator is introduced. With high speed input data flow, the algorithm of parallel-decomposition and coefficientpartitioned convolution is proposed to meet the realtime requirement. With the decomposition of the input data and the coefficient sequence, the input data flow from ADC with high sample rate can be slow down; with the partition of the coefficient sequence, the overall convolution process can be partitioned into several sub-convolutions and implementing into multichip FPGA hardware platform. The algorithm and design architecture shown in the paper is useful in complicate radar echo signal simulation with broadband coverage and low input-output delay.

源语言英语
主期刊名Proceedings of the International Conference on Computer Science and Information Technology, ICCSIT 2008
162-166
页数5
DOI
出版状态已出版 - 2008
活动International Conference on Computer Science and Information Technology, ICCSIT 2008 - Singapore, 新加坡
期限: 29 8月 20082 9月 2008

出版系列

姓名Proceedings of the International Conference on Computer Science and Information Technology, ICCSIT 2008

会议

会议International Conference on Computer Science and Information Technology, ICCSIT 2008
国家/地区新加坡
Singapore
时期29/08/082/09/08

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