An FPGA Implementation of Rapid Switch Module for EtherCAT Slave Controller

Jun Gong*, Yong Zhou, Senlin Luo

*此作品的通讯作者

科研成果: 书/报告/会议事项章节章节同行评审

2 引用 (Scopus)

摘要

In this paper. We use FPGA to achieve high-performance cycle times for EtherCAT Slave Controller (ESC) internal data switch between ports. Commonly, ESC is implemented by a dedicated chip. Using FPGA to implement ESC can improve its scalability as much as possible while ensuring the basic functions of ESC. For the FPGA, XILINX ZYNQ was selected to take full advantage of the heterogeneous characteristics of its processor. The mature IP was used to implement the MAC and switching logic on the programmable logic (PL) side, while the EtherCAT software protocol stack and driver can be implemented on the programming system (PS) side. Our first objective is to introduce the implementation of the EtherCAT slave controller’s rapid switch module. The switch logic is created as IP core, and can be easily ported on any of the FPGA devices. The second objective is to provide the FPGA developers with some useful guidelines during the EtherCAT slave design. Furthermore, it measure the proposed FPGA based ESC switch module performance in the lab.

源语言英语
主期刊名Lecture Notes on Data Engineering and Communications Technologies
出版商Springer Science and Business Media Deutschland GmbH
543-552
页数10
DOI
出版状态已出版 - 2021

出版系列

姓名Lecture Notes on Data Engineering and Communications Technologies
88
ISSN(印刷版)2367-4512
ISSN(电子版)2367-4520

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