An FPGA Implementation of Rapid Switch Module for EtherCAT Slave Controller

Jun Gong*, Yong Zhou, Senlin Luo

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingChapterpeer-review

2 Citations (Scopus)

Abstract

In this paper. We use FPGA to achieve high-performance cycle times for EtherCAT Slave Controller (ESC) internal data switch between ports. Commonly, ESC is implemented by a dedicated chip. Using FPGA to implement ESC can improve its scalability as much as possible while ensuring the basic functions of ESC. For the FPGA, XILINX ZYNQ was selected to take full advantage of the heterogeneous characteristics of its processor. The mature IP was used to implement the MAC and switching logic on the programmable logic (PL) side, while the EtherCAT software protocol stack and driver can be implemented on the programming system (PS) side. Our first objective is to introduce the implementation of the EtherCAT slave controller’s rapid switch module. The switch logic is created as IP core, and can be easily ported on any of the FPGA devices. The second objective is to provide the FPGA developers with some useful guidelines during the EtherCAT slave design. Furthermore, it measure the proposed FPGA based ESC switch module performance in the lab.

Original languageEnglish
Title of host publicationLecture Notes on Data Engineering and Communications Technologies
PublisherSpringer Science and Business Media Deutschland GmbH
Pages543-552
Number of pages10
DOIs
Publication statusPublished - 2021

Publication series

NameLecture Notes on Data Engineering and Communications Technologies
Volume88
ISSN (Print)2367-4512
ISSN (Electronic)2367-4520

Keywords

  • EtherCAT
  • FPGA
  • Slave controller
  • Switch

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