TY - JOUR
T1 - 一种动态可配置二维CFAR处理器的设计与实现
AU - Gao, Wei
AU - Yang, Hao
AU - Jiang, Rong Kun
AU - Xie, Fang
AU - Zhou, Zhe
AU - Wang, Xiao Hua
N1 - Publisher Copyright:
© 2020, Editorial Department of Transaction of Beijing Institute of Technology. All right reserved.
PY - 2020/7/1
Y1 - 2020/7/1
N2 - A hardware architecture of runtime-configurable two-dimensional constant false alarm rate CFAR processor was proposed based on FPGA to improve the algorithm speed for multi-scenario. This processor was designed to implement four pipeline architecture operations, cell averaging (CA), greatest of (GO), smallest of (SO) and ordered statistics (OS), for two-dimensional rectangular window (2D-RW) detectors. Also, controlling correlative parameters, this processor could make the reference window size, guard window size and detector type configurable. Test results show that, for 256×512 points data, the computation time of each detector in the processor is less than 3ms, and the relative error of detection threshold is no more than 0.1%, validating its better detection ability for two-dimensional radar data.
AB - A hardware architecture of runtime-configurable two-dimensional constant false alarm rate CFAR processor was proposed based on FPGA to improve the algorithm speed for multi-scenario. This processor was designed to implement four pipeline architecture operations, cell averaging (CA), greatest of (GO), smallest of (SO) and ordered statistics (OS), for two-dimensional rectangular window (2D-RW) detectors. Also, controlling correlative parameters, this processor could make the reference window size, guard window size and detector type configurable. Test results show that, for 256×512 points data, the computation time of each detector in the processor is less than 3ms, and the relative error of detection threshold is no more than 0.1%, validating its better detection ability for two-dimensional radar data.
KW - Field programmable gate array (FPGA)
KW - Radar target detection
KW - Runtime-configurable
KW - Two-dimensional constant false alarm rate
UR - http://www.scopus.com/inward/record.url?scp=85089675175&partnerID=8YFLogxK
U2 - 10.15918/j.tbit1001-0645.2018.517
DO - 10.15918/j.tbit1001-0645.2018.517
M3 - 文章
AN - SCOPUS:85089675175
SN - 1001-0645
VL - 40
SP - 797
EP - 802
JO - Beijing Ligong Daxue Xuebao/Transaction of Beijing Institute of Technology
JF - Beijing Ligong Daxue Xuebao/Transaction of Beijing Institute of Technology
IS - 7
ER -