TY - JOUR
T1 - Lightweight Architecture for Elliptic Curve Scalar Multiplication over Prime Field
AU - Hao, Yue
AU - Zhong, Shun’an
AU - Ma, Mingzhi
AU - Jiang, Rongkun
AU - Huang, Shihan
AU - Zhang, Jingqi
AU - Wang, Weijiang
N1 - Publisher Copyright:
© 2022 by the authors.
PY - 2022/7
Y1 - 2022/7
N2 - In this paper, we present a novel lightweight elliptic curve scalar multiplication architecture for random Weierstrass curves over prime field (Formula presented.). The elliptic curve scalar multiplication is executed in Jacobian coordinates based on the Montgomery ladder algorithm with (X,Y)-only common Z coordinate arithmetic. At the finite field operation level, the adder-based modular multiplier and modular divider are optimized by the pre-calculation method to reduce the critical path while maintaining low resource consumption. At the group operation level, the point addition and point doubling methods in (X,Y)-only common Z coordinate arithmetic are modified to improve computation parallelism. A compact scheduling method is presented to improve the architecture’s performance, which includes appropriate scheduling of finite field operations and specific register connections. Compared with existing works, our design is implemented on the FPGA platform without using DSPs or BRAMs for higher portability. It utilizes 6.4~6.5k slices in Kintex-7, Virtex-7, and ZYNQ FPGA and executes an elliptic curve scalar multiplication for a field size of 256-bit in 1.73 ms, 1.70 ms, and 1.80 ms, respectively. Additionally, our design is resistant to timing attacks, simple power analysis attacks, and safe-error attacks. This architecture outperforms most state-of-the-art lightweight designs in terms of area-time products.
AB - In this paper, we present a novel lightweight elliptic curve scalar multiplication architecture for random Weierstrass curves over prime field (Formula presented.). The elliptic curve scalar multiplication is executed in Jacobian coordinates based on the Montgomery ladder algorithm with (X,Y)-only common Z coordinate arithmetic. At the finite field operation level, the adder-based modular multiplier and modular divider are optimized by the pre-calculation method to reduce the critical path while maintaining low resource consumption. At the group operation level, the point addition and point doubling methods in (X,Y)-only common Z coordinate arithmetic are modified to improve computation parallelism. A compact scheduling method is presented to improve the architecture’s performance, which includes appropriate scheduling of finite field operations and specific register connections. Compared with existing works, our design is implemented on the FPGA platform without using DSPs or BRAMs for higher portability. It utilizes 6.4~6.5k slices in Kintex-7, Virtex-7, and ZYNQ FPGA and executes an elliptic curve scalar multiplication for a field size of 256-bit in 1.73 ms, 1.70 ms, and 1.80 ms, respectively. Additionally, our design is resistant to timing attacks, simple power analysis attacks, and safe-error attacks. This architecture outperforms most state-of-the-art lightweight designs in terms of area-time products.
KW - Co-Z arithmetic
KW - Montgomery ladder
KW - elliptic curve cryptography (ECC)
KW - field programmable gate array (FPGA)
KW - lightweight implementation
UR - http://www.scopus.com/inward/record.url?scp=85136396248&partnerID=8YFLogxK
U2 - 10.3390/electronics11142234
DO - 10.3390/electronics11142234
M3 - Article
AN - SCOPUS:85136396248
SN - 2079-9292
VL - 11
JO - Electronics (Switzerland)
JF - Electronics (Switzerland)
IS - 14
M1 - 2234
ER -