Fractional-N frequency synthesis: Overview and practical aspects with FIR-embedded design

Woogeun Rhee, Ni Xu, Bo Zhou, Zhihua Wang

Research output: Contribution to journalArticlepeer-review

10 Citations (Scopus)
Plum Print visual indicator of research metrics
  • Citations
    • Citation Indexes: 10
  • Captures
    • Readers: 15
see details

Abstract

This paper gives an overview of fractional-N phase-locked loops (PLLs) with practical design perspectives focusing on a ΔΣ modulation technique and a finite-impulse response (FIR) filtering method. Spur generation and nonlinearity issues in the ΔΣ fractional-N PLLs are discussed with simulation and hardware results. High-order ΔΣ modulation with FIR-embedded filtering is considered for low noise frequency generation. Also, various architectures of finite-modulo fractional-N PLLs are reviewed for alternative low cost design, and the FIR filtering technique is shown to be useful for spur reduction in the finite-modulo fractional-N PLL design.

Original languageEnglish
Pages (from-to)170-183
Number of pages14
JournalJournal of Semiconductor Technology and Science
Volume13
Issue number2
DOIs
Publication statusPublished - Apr 2013
Externally publishedYes

Keywords

  • CMOS integrated circuits
  • Delta-sigma modulator
  • Fractional-N
  • Frequency synthesizer
  • PLL

Fingerprint

Dive into the research topics of 'Fractional-N frequency synthesis: Overview and practical aspects with FIR-embedded design'. Together they form a unique fingerprint.

Cite this

Rhee, W., Xu, N., Zhou, B., & Wang, Z. (2013). Fractional-N frequency synthesis: Overview and practical aspects with FIR-embedded design. Journal of Semiconductor Technology and Science, 13(2), 170-183. https://doi.org/10.5573/JSTS.2013.13.2.170