A high-throughput and size-efficient NoC buffer design method

Wenbiao Zhou*, Zhenyu Liu, Yanjun Zhang, Siye Wang, Dake Liu

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Citation (Scopus)

Abstract

This paper presents a high-throughput and size efficient buffer design method for an application specific NoC. The method firstly configures on chip buffer according with the mapping position of IP and the routing path of communication pairs, then computes the minimum value of buffer's size under NoC performance guarantee. Under the same buffer size, the experiments show that the method results in the 40% improvement of the throughput when compared the common input buffer design method.

Original languageEnglish
Title of host publication2012 International Conference on Systems and Informatics, ICSAI 2012
Pages4-7
Number of pages4
DOIs
Publication statusPublished - 2012
Event2012 International Conference on Systems and Informatics, ICSAI 2012 - Yantai, China
Duration: 19 May 201220 May 2012

Publication series

Name2012 International Conference on Systems and Informatics, ICSAI 2012

Conference

Conference2012 International Conference on Systems and Informatics, ICSAI 2012
Country/TerritoryChina
CityYantai
Period19/05/1220/05/12

Keywords

  • Buffer
  • Network Calculus
  • NoC
  • Throughput

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