A High-Efficiency Push-Pull Parallel-Circuit Class-E/F3 Power Amplifier for Harmonic Suppression

Heng Lu, Jianliang Jiang*, Hengli Zhang

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

Abstract

In this article, a high-efficiency push-pull parallel-circuit (PC) Class-E/F3 power amplifier (PA) with a harmonic suppression network for radio frequency identification (RFID) applications is presented. With the double reactance compensation technique (D-RCT), the PA's design of broadband performance is achieved. In addition, a low-pass (LP) Chebyshev technique is introduced to provide a simple fundamental matching network (MN). Finally, a high-efficiency push-pull PC Class-E/F3 PA is fabricated and measured. The experimental results illustrate that an output power (Pout) is from 36.83 to 41.84 dBm and 82.35%-91.32% drain efficiency (DE) operating from 5 to 10.5 MHz frequency range, which agrees well with the simulation results.

Original languageEnglish
Pages (from-to)1170-1173
Number of pages4
JournalIEEE Microwave and Wireless Technology Letters
Volume34
Issue number10
DOIs
Publication statusPublished - 2024

Keywords

  • Class-E/FâBB
  • high-efficiency
  • parallel-circuit (PC)
  • power amplifier (PA)
  • push-pull

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