A CMOS Receiver Front-End for K-Band Low-Noise System-on-Chip

Xiao Ran Li, Shun An Zhong

Research output: Contribution to journalArticlepeer-review

1 Citation (Scopus)

Abstract

The Si-base technology can help SOC (system-on-chip) to achieve smaller size, lower cost and low power consumption. In this paper, a fully integrated K-band CMOS receiver front-end was designed based on TSMC 90 nm CMOS technology. The receiver front-end consisted of a 2-stage differential cascode low noise amplifier (LNA) and a double balanced Gilbert cell down-conversion mixer. The RF input, LO input and between the LNA and mixer were matched with on-chip transformer Balun. Measurement results show that, when RF is at 23.2 GHz, the conversion gain can reach 27.6 dB, the noise figure just is 3.8 dB, and a high isolation can be got. The receiver chip consumes 35 mW with a 1.2 V power supply, and only occupies a chip area of 1.45×0.60 mm2.

Original languageEnglish
Pages (from-to)287-291
Number of pages5
JournalBeijing Ligong Daxue Xuebao/Transaction of Beijing Institute of Technology
Volume37
Issue number3
DOIs
Publication statusPublished - 1 Mar 2017

Keywords

  • CMOS
  • Down-conversion mixer
  • K-band
  • Low noise amplifier
  • Receiver front-end

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Li, X. R., & Zhong, S. A. (2017). A CMOS Receiver Front-End for K-Band Low-Noise System-on-Chip. Beijing Ligong Daxue Xuebao/Transaction of Beijing Institute of Technology, 37(3), 287-291. https://doi.org/10.15918/j.tbit1001-0645.2017.03.012