@inproceedings{f8acf712c1eb4ca0bcbd959554289c1d,
title = "Unified approach for simulation of statistical reliability in nanoscale CMOS transistors from devices to circuits",
abstract = "In this paper we will present integrated time dependent variability tool flow that links statistical TCAD simulations, statistical compact model extraction and statistical circuit simulation. This allows the concepts of Design-Technology Co-Optimization (DTCO) to be extended into the reliability domain. The simulations are based on Gold Standard Simulations' (GSS) 3-D Kinetic Monte Carlo TCAD technology, which enables the simulation and analysis of the trapping/de-trapping history of large ensembles of microscopically different transistors. The results of the physical simulation are than captured in accurate time dependent statistical compact models. As a result, accurate statistical circuit simulation can trace the statistical impact of the degradation on the functionality of the underlying circuits and systems.",
keywords = "BTI, SRAM, TCAD, statistical circuit simulation, statistical compact models, statistical variability",
author = "A. Asenov and J. Ding and D. Reid and P. Asenov and S. Amoroso and F. Adamu-Lema and L. Gerrer",
note = "Publisher Copyright: {\textcopyright} 2015 IEEE.; IEEE International Symposium on Circuits and Systems, ISCAS 2015 ; Conference date: 24-05-2015 Through 27-05-2015",
year = "2015",
month = jul,
day = "27",
doi = "10.1109/ISCAS.2015.7169180",
language = "English",
series = "Proceedings - IEEE International Symposium on Circuits and Systems",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "2449--2452",
booktitle = "2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015",
address = "United States",
}