Tracking radar digital matched-filter ASIC design

Zhenyu Liu; Zhimei Zhou

Tracking radar digital matched-filter ASIC design

Zhenyu Liu^*, Zhimei Zhou

^*此作品的通讯作者

信息与电子学院

Beijing Institute of Technology

科研成果: 书/报告/会议事项章节 › 章节 › 同行评审

摘要

Matched-filter is widely used in real time signal processing, especially in Radar Signal Processing. This paper provides a novel structure of digital matched-filter used in tracking radar system. This design applies block-floating-point arithmetic to improve the precision. The whole digital matched-filter is implemented in only one chip of FPGA. This ASIC has two work modes: 512 points pulse compression and 256 points pulse, compression. It complements three channels of 512 points complex signal pulse compression in 102us.

源语言	英语
主期刊名	Recent Advances in Circuits, Systems and Signal Processing
出版商	World Scientific and Engineering Academy and Society
页	98-103
页数	6
ISBN（印刷版）	9608052645
出版状态	已出版 - 2002

其它文件与链接

链接到 Scopus 的出版物

引用此

Liu, Z., & Zhou, Z. (2002). Tracking radar digital matched-filter ASIC design. 在 Recent Advances in Circuits, Systems and Signal Processing (页码 98-103). World Scientific and Engineering Academy and Society.

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Tracking radar digital matched-filter ASIC design

摘要

其它文件与链接

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引用此