Reversible High Speed Binary Content Addressable Memory array design using Transmission Gate Logic

Alekhya Yalla*, Umakanta Nanda, Chandan Kumar Pandey, Shujun Ye

*此作品的通讯作者

科研成果: 书/报告/会议事项章节会议稿件同行评审

3 引用 (Scopus)

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Computer Science

Engineering