摘要
An S-band wideband chirp generator using specially designed fast lock phase lock loop (FL-PLL) was demonstrated. To realize high linearity, structure of direct digital synthesizer (DDS) plus FL-PLL was used. DDS gives ideal linearity while FL-PLL retains the linearity and provides radio frequency. The system block diagrams were showed and the timing relationships of the components were provided. Two important considerations of the system, wideband loop and wideband voltage control oscillator (VCO), were discussed; meanwhile, after analyzing the considerations, corresponding solutions were presented. Measurement results show that the generated 2560 MHz to 2960 MHz chirp reaches a high FM linearity of 0.003%.
源语言 | 英语 |
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页(从-至) | 540-545 |
页数 | 6 |
期刊 | Journal of Beijing Institute of Technology (English Edition) |
卷 | 20 |
期 | 4 |
出版状态 | 已出版 - 12月 2011 |