摘要
Spacecraft rendezvous and docking (RVD) is one of the major tasks in space flight mission. This study discusses an approach for simulating the intermediate frequency (IF) signals which the RVD radar received based on the principle of direct digital synthesizer (DDS). The velocity, distance simulation and noise generator are presented respectively. The whole simulation system was implemented on the platform of field- programmable gate array (FPGA).
| 源语言 | 英语 |
|---|---|
| 主期刊名 | IET International Radar Conference 2009 |
| 版本 | 551 CP |
| DOI | |
| 出版状态 | 已出版 - 2009 |
| 活动 | IET International Radar Conference 2009 - Guilin, 中国 期限: 20 4月 2009 → 22 4月 2009 |
出版系列
| 姓名 | IET Conference Publications |
|---|---|
| 编号 | 551 CP |
会议
| 会议 | IET International Radar Conference 2009 |
|---|---|
| 国家/地区 | 中国 |
| 市 | Guilin |
| 时期 | 20/04/09 → 22/04/09 |
指纹
探究 'Design of RVD radar if signal simulator based on FPGA' 的科研主题。它们共同构成独一无二的指纹。引用此
Jian, Z., Feng, H., & Siliang, W. (2009). Design of RVD radar if signal simulator based on FPGA. 在 IET International Radar Conference 2009 (551 CP 编辑). (IET Conference Publications; 号码 551 CP). https://doi.org/10.1049/cp.2009.0386