Advanced des algorithm against differential power analysis and its hardware implementation

Huiping Jiang*, Rui Xu, Sheng Bao

*此作品的通讯作者

科研成果: 书/报告/会议事项章节会议稿件同行评审

摘要

In this article, the advanced DES algorithm against differential power analysis (DPA) is provided, based on the original model of DPA. The DES_DPA module is build according to the above principle, which the linear part of the module adopted the MASK technology for the specialty of the DES algorithm and the localizations of the storage. And its efficiency was explained from the view of DPA's principle. With 0.25μm CMOS technology library, the result showed that the gate count of DES_DPA module is about 1914, the maximize delay is 9.57 ns, and can be worked correctly under 100 MHz, so that it is well suited to the field of smart card and the information security.

源语言英语
主期刊名Proceedings of the 1st International Symposium on Data, Privacy, and E-Commerce, ISDPE 2007
316-320
页数5
DOI
出版状态已出版 - 2007
活动1st International Symposium on Data, Privacy, and E-Commerce, ISDPE 2007 - Chengdu, 中国
期限: 1 11月 20073 11月 2007

出版系列

姓名Proceedings of the 1st International Symposium on Data, Privacy, and E-Commerce, ISDPE 2007

会议

会议1st International Symposium on Data, Privacy, and E-Commerce, ISDPE 2007
国家/地区中国
Chengdu
时期1/11/073/11/07

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