A 10-bit 120-MS/s SAR ADC in 90nm CMOS with redundancy compensation

Engineering

• Analog-to-Digital Converter 100%
• Successive Approximation 100%
• Simulation Result 50%
• Sampling Rate 50%
• Input Signal 50%
• Comparator 50%
• Single Channel 50%
• Supply Voltage 50%
• Switching Sequence 50%
• Chip Area 50%
• Common Mode Voltage 50%