摘要
In the missile flight test, a variety of physical parameters need to be accurately monitored, so the multi-channel high-speed data recorder will store a large amount of data during the flight of the missile. In order to solve these problems of slow and time-consuming readback of large amounts of data in the memory, the ultra-high-speed USB 3.0 controller CYUSB3014 was used to realize the design of a high-speed data transmission system between the FPGA and the upper computer.After receiving the read data command had been sent by the upper computer through the CYUSB3014, the FPGA read and sent the data in a flash to the upper computer.The upper computer stored the received data onto the form of a binary file on the solid state hard disk, which was convenient for post-processing data. According to the characteristics of the system with large upload data volume and small download data volume,the number of P2U channel buffers in the CYUSB3014 was configured to 8 and the data volume of U2P channel buffers was 4 to enhance the upload high throughput performance.After testing, in the case of error-free frames and dropped frames, the CYUSB3014 data transmission speed is 346.23 MB/s, the speed of the host computer to receive data and write to the hard disk is 116.56 MB/s.
投稿的翻译标题 | Design of High Speed Data Read Back System Based on USB 3.0 |
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源语言 | 繁体中文 |
页(从-至) | 187-192 |
页数 | 6 |
期刊 | Zhongbei Daxue Xuebao (Ziran Kexue Ban)/Journal of North University of China (Natural Science Edition) |
卷 | 42 |
期 | 2 |
DOI | |
出版状态 | 已出版 - 4月 2021 |
已对外发布 | 是 |
关键词
- FPGA
- High speed data transmission system
- USB 3.0
- Upper computer