Implementation of Turbo decoder with reduced complexity for spacecraft

Qi Zhang; Yong Qing Wang; Dong Lei Liu

doi:10.3873/j.issn.1000-1328.2013.12.012

Implementation of Turbo decoder with reduced complexity for spacecraft

Qi Zhang^*, Yong Qing Wang, Dong Lei Liu

^*Corresponding author for this work

School of Information and Electronics

Beijing Institute of Technology

Research output: Contribution to journal › Article › peer-review

1 Citation (Scopus)

Abstract

Aiming at practical requirements for the received sharply-attenuated weak signal process in space TT&C communication system, an implementation technique of low-complexity Turbo decoder for spacecraft is studied. A modified Turbo decoder structure implemented on FPGA is presented by adopting the Log-MAP algorithm based on approximation by broken line. First, much computation in branch metric of iterative decoding is simplified to save storage resources. Next, a semi-parallel processing is proposed to optimize the whole hardware architecture and raise decoding rate. Through the interleaver and generator matrix recommend by CCSDS, simulation and measured results show that storage process complexity is cut by 29.6% without more slice resources and the coding gain reaches 9.9dB at the BER of 10^-6. This decoder has been successfully applied to an aerospace engineering.

Original language	English
Pages (from-to)	1621-1627
Number of pages	7
Journal	Yuhang Xuebao/Journal of Astronautics
Volume	34
Issue number	12
DOIs	https://doi.org/10.3873/j.issn.1000-1328.2013.12.012
Publication status	Published - 2013

Keywords

Reduced complexity
Semi-parallel structure
Space TT&C communication
Turbo

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title = "Implementation of Turbo decoder with reduced complexity for spacecraft",

abstract = "Aiming at practical requirements for the received sharply-attenuated weak signal process in space TT&C communication system, an implementation technique of low-complexity Turbo decoder for spacecraft is studied. A modified Turbo decoder structure implemented on FPGA is presented by adopting the Log-MAP algorithm based on approximation by broken line. First, much computation in branch metric of iterative decoding is simplified to save storage resources. Next, a semi-parallel processing is proposed to optimize the whole hardware architecture and raise decoding rate. Through the interleaver and generator matrix recommend by CCSDS, simulation and measured results show that storage process complexity is cut by 29.6% without more slice resources and the coding gain reaches 9.9dB at the BER of 10-6. This decoder has been successfully applied to an aerospace engineering.",

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T1 - Implementation of Turbo decoder with reduced complexity for spacecraft

AU - Zhang, Qi

AU - Wang, Yong Qing

AU - Liu, Dong Lei

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AB - Aiming at practical requirements for the received sharply-attenuated weak signal process in space TT&C communication system, an implementation technique of low-complexity Turbo decoder for spacecraft is studied. A modified Turbo decoder structure implemented on FPGA is presented by adopting the Log-MAP algorithm based on approximation by broken line. First, much computation in branch metric of iterative decoding is simplified to save storage resources. Next, a semi-parallel processing is proposed to optimize the whole hardware architecture and raise decoding rate. Through the interleaver and generator matrix recommend by CCSDS, simulation and measured results show that storage process complexity is cut by 29.6% without more slice resources and the coding gain reaches 9.9dB at the BER of 10-6. This decoder has been successfully applied to an aerospace engineering.

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Implementation of Turbo decoder with reduced complexity for spacecraft

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Keywords

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