Abstract
Two existing DFT/FFT algorithms and a new prime-point Fast Fourier Transform algorithm are implemented with different serial and parallel processors. The evaluation results show that previous multiplication computational cost criterion is no longer applicable to the current parallel implementation. Total computational cost including add/subtract operation is one of the key factors affecting the speed and efficiency of implementation of parallel architecture.
Original language | English |
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Title of host publication | 2012 International Conference on Systems and Informatics, ICSAI 2012 |
Pages | 1693-1697 |
Number of pages | 5 |
DOIs | |
Publication status | Published - 2012 |
Event | 2012 International Conference on Systems and Informatics, ICSAI 2012 - Yantai, China Duration: 19 May 2012 → 20 May 2012 |
Publication series
Name | 2012 International Conference on Systems and Informatics, ICSAI 2012 |
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Conference
Conference | 2012 International Conference on Systems and Informatics, ICSAI 2012 |
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Country/Territory | China |
City | Yantai |
Period | 19/05/12 → 20/05/12 |
Keywords
- DFT
- FFT
- SIMD
- SISD
- prime factor FFT
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Liu, Z., Wang, H., Xie, Q., Zhang, Y., Zhou, W., & Liu, D. (2012). Implementation of prime-point DFTs with programable processors. In 2012 International Conference on Systems and Informatics, ICSAI 2012 (pp. 1693-1697). Article 6223367 (2012 International Conference on Systems and Informatics, ICSAI 2012). https://doi.org/10.1109/ICSAI.2012.6223367