@inproceedings{b332d362ecf74e47a186e2a9f0d9ba98,
title = "An implementation of FFT processor",
abstract = "This paper introduced a FPGA design scheme of the Radix-22 in the realization of the FFT processor. This method with the SDF structure was considered to decrease the control complexity, increase the utilization factor of the butterfly. The numbers of storage and multiplier were reduced and nonstopping input data could be processed because of the pipeline architecture. At last the architecture was implemented with the Xilinx ISE development tool using VHDL and the balance of different aspects such as speed, resource and storage was tried. Experimentation shows that it is a feasible method to use R22 algorithm to realize FFT transform.",
keywords = "FFT processor, Radix-2, SDF structure",
author = "Xing Sun and Dongli Qiu and Chen He and Dong Chen",
year = "2013",
doi = "10.1049/cp.2013.0360",
language = "English",
isbn = "9781849196031",
series = "IET Conference Publications",
number = "617 CP",
booktitle = "IET International Radar Conference 2013",
edition = "617 CP",
note = "IET International Radar Conference 2013 ; Conference date: 14-04-2013 Through 16-04-2013",
}