A hardware gaussian noise generator and evaluation

Song Yuanyuan*, Zeng Tao, Zeng Dazhi

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Citation (Scopus)

Abstract

We present a hardware Gaussian noise generator based on the Box-Muller method that provides highly accurate noise samples. The main novelty of this work is the use and precision analysis of CORDIC IPcore on a Xilinx device in computing square root and logarithmic function. The bit- widths of parameters are chosen carefully to enable rapid computation and sufficient precision. The implementation on a Xilinx Virtex-4 XC4VFX100-10 FPGA occupies 1,104 slices, 2 block RAM and 2 DSP48s. It generates two 14-bit noise samples every clock cycle and 400 million samples per second at a clock speed of 200 MHz. The performance can be improved by parallel instances. During the generation of Gaussian noise, we can also get random numbers drawn from uniform distribution, exponential distribution and Rayleigh distribution. The noise generator can be used as a key component in a hardware-based Radar echo simulator to test the sensitivity of the Radio receiver.

Original languageEnglish
Title of host publicationIET International Radar Conference 2009
Edition551 CP
DOIs
Publication statusPublished - 2009
EventIET International Radar Conference 2009 - Guilin, China
Duration: 20 Apr 200922 Apr 2009

Publication series

NameIET Conference Publications
Number551 CP

Conference

ConferenceIET International Radar Conference 2009
Country/TerritoryChina
CityGuilin
Period20/04/0922/04/09

Keywords

  • Box-Muller algorithm
  • Field-programmable gate array
  • Gaussian random noise
  • Pseudo-random number generator

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