Two-stage degradation in n-channel LTPS-TFTs under negative and positive bias stresses

Device degradation behaviors of n-channel low-temperature polycrystalline silicon thin film transistors under negative bias stress and positive bias stress were investigated. It was found that the threshold-voltage has a two-stage degradation, shifting to different direction with time. The mobility and the subthreshold swing SS both show a dependence on the stress time. It was determined that the interface trap states, the grain boundary trap states, and electron trapping together dominate the time-dependent degradation behaviors. The trap is caused by the rupture of Si─H and Si─O bonds. A comprehensive model is proposed to explain the time-dependent degradation behaviors clearly. In addition, after removing the stress, the recovery behaviors of threshold voltage V_th can be observed, which provide the evidence supporting the degradation model proposed.