Two-channel time-interleaved pipelined ADC using shared amplifiers

Zhuo Zhang; Shun'an Zhong; Xing Hua Wang

doi:10.1109/ICCAE.2010.5452031

Two-channel time-interleaved pipelined ADC using shared amplifiers

Zhuo Zhang^*, Shun'an Zhong, Xing Hua Wang

^*此作品的通讯作者

集成电路与电子学院

Beijing Institute of Technology

科研成果: 书/报告/会议事项章节 › 会议稿件 › 同行评审

摘要

A pipelined ADC using shared amplifiers in two-channel time-interleaved design is proposed. The two channels have a unify sample and hold amplifier. In the time-interleaved pipelined part, the large mismatch between the channels is reduced by the shared amplifier in the same stage. And power consumption and chip area also been decreased. Under SMIC 0.35um 1P6M CMOS process with 3.3V supply, the SNR is higher than 60dB with the condition that the sampling rate is 200MHz and the input frequency is scanned from 1MHz to 80MHz. The typical current consumption is about 40mA.

源语言	英语
主期刊名	2010 The 2nd International Conference on Computer and Automation Engineering, ICCAE 2010
页	92-96
页数	5
DOI	https://doi.org/10.1109/ICCAE.2010.5452031
出版状态	已出版 - 2010
活动	2nd International Conference on Computer and Automation Engineering, ICCAE 2010 - Singapore, 新加坡期限: 26 2月 2010 → 28 2月 2010

出版系列

姓名	2010 The 2nd International Conference on Computer and Automation Engineering, ICCAE 2010
卷	3

会议

会议	2nd International Conference on Computer and Automation Engineering, ICCAE 2010
国家/地区	新加坡
市	Singapore
时期	26/02/10 → 28/02/10

访问文件

10.1109/ICCAE.2010.5452031

其它文件与链接

链接到 Scopus 的出版物

引用此

Zhang, Z., Zhong, S., & Wang, X. H. (2010). Two-channel time-interleaved pipelined ADC using shared amplifiers. 在 2010 The 2nd International Conference on Computer and Automation Engineering, ICCAE 2010 (页码 92-96). 文章 5452031 (2010 The 2nd International Conference on Computer and Automation Engineering, ICCAE 2010; 卷 3). https://doi.org/10.1109/ICCAE.2010.5452031

@inproceedings{d8bbcc62a6934658b68aa38336ca23b3,

title = "Two-channel time-interleaved pipelined ADC using shared amplifiers",

abstract = "A pipelined ADC using shared amplifiers in two-channel time-interleaved design is proposed. The two channels have a unify sample and hold amplifier. In the time-interleaved pipelined part, the large mismatch between the channels is reduced by the shared amplifier in the same stage. And power consumption and chip area also been decreased. Under SMIC 0.35um 1P6M CMOS process with 3.3V supply, the SNR is higher than 60dB with the condition that the sampling rate is 200MHz and the input frequency is scanned from 1MHz to 80MHz. The typical current consumption is about 40mA.",

keywords = "Amplifier shared, CMOS, Piepelined, Time-interleaved",

author = "Zhuo Zhang and Shun'an Zhong and Wang, {Xing Hua}",

year = "2010",

doi = "10.1109/ICCAE.2010.5452031",

language = "English",

isbn = "9781424455850",

series = "2010 The 2nd International Conference on Computer and Automation Engineering, ICCAE 2010",

pages = "92--96",

booktitle = "2010 The 2nd International Conference on Computer and Automation Engineering, ICCAE 2010",

note = "2nd International Conference on Computer and Automation Engineering, ICCAE 2010 ; Conference date: 26-02-2010 Through 28-02-2010",

}

Zhang, Z, Zhong, S & Wang, XH 2010, Two-channel time-interleaved pipelined ADC using shared amplifiers. 在 2010 The 2nd International Conference on Computer and Automation Engineering, ICCAE 2010., 5452031, 2010 The 2nd International Conference on Computer and Automation Engineering, ICCAE 2010, 卷 3, 页码 92-96, 2nd International Conference on Computer and Automation Engineering, ICCAE 2010, Singapore, 新加坡, 26/02/10. https://doi.org/10.1109/ICCAE.2010.5452031

Two-channel time-interleaved pipelined ADC using shared amplifiers. / Zhang, Zhuo; Zhong, Shun'an; Wang, Xing Hua.
2010 The 2nd International Conference on Computer and Automation Engineering, ICCAE 2010. 2010. 页码 92-96 5452031 (2010 The 2nd International Conference on Computer and Automation Engineering, ICCAE 2010; 卷 3).

科研成果: 书/报告/会议事项章节 › 会议稿件 › 同行评审

TY - GEN

T1 - Two-channel time-interleaved pipelined ADC using shared amplifiers

AU - Zhang, Zhuo

AU - Zhong, Shun'an

AU - Wang, Xing Hua

PY - 2010

Y1 - 2010

N2 - A pipelined ADC using shared amplifiers in two-channel time-interleaved design is proposed. The two channels have a unify sample and hold amplifier. In the time-interleaved pipelined part, the large mismatch between the channels is reduced by the shared amplifier in the same stage. And power consumption and chip area also been decreased. Under SMIC 0.35um 1P6M CMOS process with 3.3V supply, the SNR is higher than 60dB with the condition that the sampling rate is 200MHz and the input frequency is scanned from 1MHz to 80MHz. The typical current consumption is about 40mA.

AB - A pipelined ADC using shared amplifiers in two-channel time-interleaved design is proposed. The two channels have a unify sample and hold amplifier. In the time-interleaved pipelined part, the large mismatch between the channels is reduced by the shared amplifier in the same stage. And power consumption and chip area also been decreased. Under SMIC 0.35um 1P6M CMOS process with 3.3V supply, the SNR is higher than 60dB with the condition that the sampling rate is 200MHz and the input frequency is scanned from 1MHz to 80MHz. The typical current consumption is about 40mA.

KW - Amplifier shared

KW - CMOS

KW - Piepelined

KW - Time-interleaved

UR - http://www.scopus.com/inward/record.url?scp=77952632120&partnerID=8YFLogxK

U2 - 10.1109/ICCAE.2010.5452031

DO - 10.1109/ICCAE.2010.5452031

M3 - Conference contribution

AN - SCOPUS:77952632120

SN - 9781424455850

T3 - 2010 The 2nd International Conference on Computer and Automation Engineering, ICCAE 2010

SP - 92

EP - 96

BT - 2010 The 2nd International Conference on Computer and Automation Engineering, ICCAE 2010

T2 - 2nd International Conference on Computer and Automation Engineering, ICCAE 2010

Y2 - 26 February 2010 through 28 February 2010

ER -

Two-channel time-interleaved pipelined ADC using shared amplifiers

摘要

出版系列

会议

访问文件

其它文件与链接

指纹

引用此