Time-and Frequency-Interleaving: Distinctions and Connections

Jinpeng Song, Jianping An*, Xiangyuan Bu, Xiang Gao, Yu Hen Hu

*此作品的通讯作者

科研成果: 期刊稿件文章同行评审

10 引用 (Scopus)

摘要

This paper connects the linear steady-state systematic error models of the time-and frequency-interleaved analog-To-digital converters (ADCs). Exposing their relations is of importance because estimation and compensation methods developed for one architecture may therefore apply to the other. Most critical impairments in both ADC structures include static mismatches and random jitter. The former has been well studied and can be generalized to the model connection, whereas not much is known regarding the latter. To support designers becoming more capable of making optimal design and architectural decisions on parallel ADCs, comprehensive phase noise analysis and comparison are carried out to reveal the distinctions between these two sampling architectures. Design examples with considerations are also provided for demonstration purposes.

源语言英语
文章编号9410379
页(从-至)2555-2568
页数14
期刊IEEE Transactions on Signal Processing
69
DOI
出版状态已出版 - 2021

指纹

探究 'Time-and Frequency-Interleaving: Distinctions and Connections' 的科研主题。它们共同构成独一无二的指纹。

引用此

Song, J., An, J., Bu, X., Gao, X., & Hu, Y. H. (2021). Time-and Frequency-Interleaving: Distinctions and Connections. IEEE Transactions on Signal Processing, 69, 2555-2568. 文章 9410379. https://doi.org/10.1109/TSP.2021.3074013