@inproceedings{08a29128d7504dcb8cc7c87c20284e50,
title = "The Reconfigurable Pipelined Variable-point FFT Processor Design",
abstract = "In the multi-mode SAR imaging processing targeted in this paper, the FFT requirement granularity ranges from 1024 to 32768. Therefore, this paper mainly describes the method of implementing reconfigurable and variable-level FFT units using radix-2k, By analyzing and comparing the radix 2k algorithm, the radix-23 is selected as the basis of the single-channel FFT butterfly, and the range of the point representation is extended by the butterfly transformation downward compatible with the radix-22/radix-2. This paper realizes an architecture of the single channel delay feedback variable-point, high precision FFT processor.",
keywords = "FFT, floating-point, pipelined, reconfigurable, single delay feedback, variable-radix",
author = "Jiale Wang and Yizhuang Xie and Bingyi Li and Chen Yang and Shankang Hu",
note = "Publisher Copyright: {\textcopyright} 2019 IEEE.; 2019 IEEE International Conference on Signal, Information and Data Processing, ICSIDP 2019 ; Conference date: 11-12-2019 Through 13-12-2019",
year = "2019",
month = dec,
doi = "10.1109/ICSIDP47821.2019.9172930",
language = "English",
series = "ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019",
address = "United States",
}