The design and realization of an image acquisition system

X. H. Xu; R. Tao; Y. Wang

The design and realization of an image acquisition system

X. H. Xu^*, R. Tao, Y. Wang

^*此作品的通讯作者

信息与电子学院

Beijing Institute of Technology

科研成果: 期刊稿件 › 文章 › 同行评审

摘要

A novel system is designed to digitize general video signals. The hardware principle and software principle of the system are described. The timing and synchronization of the circuits are achieved by an EPLD chip which can achieve the sam by many separate components in the previous digitizing systems. This idea is favorable for the design of circuits and easy for debugging. A PLL circuit is adopted in order to control video signal synchronization.

源语言	英语
页（从-至）	13-15+97
期刊	Xi Tong Gong Cheng Yu Dian Zi Ji Shu/Systems Engineering and Electronics
卷	23
期	10
出版状态	已出版 - 10月 2001

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title = "The design and realization of an image acquisition system",

abstract = "A novel system is designed to digitize general video signals. The hardware principle and software principle of the system are described. The timing and synchronization of the circuits are achieved by an EPLD chip which can achieve the sam by many separate components in the previous digitizing systems. This idea is favorable for the design of circuits and easy for debugging. A PLL circuit is adopted in order to control video signal synchronization.",

keywords = "Control circuit, Image processing, System design, Video signal",

author = "Xu, {X. H.} and R. Tao and Y. Wang",

year = "2001",

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language = "English",

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AU - Xu, X. H.

AU - Tao, R.

AU - Wang, Y.

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N2 - A novel system is designed to digitize general video signals. The hardware principle and software principle of the system are described. The timing and synchronization of the circuits are achieved by an EPLD chip which can achieve the sam by many separate components in the previous digitizing systems. This idea is favorable for the design of circuits and easy for debugging. A PLL circuit is adopted in order to control video signal synchronization.

AB - A novel system is designed to digitize general video signals. The hardware principle and software principle of the system are described. The timing and synchronization of the circuits are achieved by an EPLD chip which can achieve the sam by many separate components in the previous digitizing systems. This idea is favorable for the design of circuits and easy for debugging. A PLL circuit is adopted in order to control video signal synchronization.

KW - Control circuit

KW - Image processing

KW - System design

KW - Video signal

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M3 - Article

AN - SCOPUS:0035481961

SN - 1001-506X

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JF - Xi Tong Gong Cheng Yu Dian Zi Ji Shu/Systems Engineering and Electronics

IS - 10

ER -

The design and realization of an image acquisition system

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