摘要
Galois Field arithmetic is the basis of LRC, RS and many other erasure coding approaches. Traditional implementations of Galois Field arithmetic use multiplication tables or discrete logarithms, which limit the speed of its computation. The Intel Many Integrated Core (MIC) Architecture provides 60 cores on chip and very wide 512-bit SIMD instructions, attractive for data intensive applications. This paper demonstrates how to leverage SIMD instructions and shared memory multiprocessing on MIC to perform Galois Field arithmetic. The experiments show that the performance of the computation is significantly enhanced.
| 源语言 | 英语 |
|---|---|
| 主期刊名 | Network and Parallel Computing - 10th IFIP International Conference, NPC 2013, Proceedings |
| 页 | 143-154 |
| 页数 | 12 |
| DOI | |
| 出版状态 | 已出版 - 2013 |
| 已对外发布 | 是 |
| 活动 | 10th IFIP International Conference on Network and Parallel Computing, NPC 2013 - Guiyang, 中国 期限: 19 9月 2013 → 21 9月 2013 |
出版系列
| 姓名 | Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) |
|---|---|
| 卷 | 8147 LNCS |
| ISSN（印刷版） | 0302-9743 |
| ISSN（电子版） | 1611-3349 |
会议
| 会议 | 10th IFIP International Conference on Network and Parallel Computing, NPC 2013 |
|---|---|
| 国家/地区 | 中国 |
| 市 | Guiyang |
| 时期 | 19/09/13 → 21/09/13 |
指纹
探究 'Speeding up Galois field arithmetic on Intel MIC architecture' 的科研主题。它们共同构成独一无二的指纹。引用此
Feng, K., Ma, W., Huang, W., Zhang, Q., & Gong, Y. (2013). Speeding up Galois field arithmetic on Intel MIC architecture. 在 Network and Parallel Computing - 10th IFIP International Conference, NPC 2013, Proceedings (页码 143-154). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); 卷 8147 LNCS). https://doi.org/10.1007/978-3-642-40820-5_13