@inproceedings{5fd0129bc660483994a4c7ef4d0d5a7e,
title = "Speeding up Galois field arithmetic on Intel MIC architecture",
abstract = "Galois Field arithmetic is the basis of LRC, RS and many other erasure coding approaches. Traditional implementations of Galois Field arithmetic use multiplication tables or discrete logarithms, which limit the speed of its computation. The Intel Many Integrated Core (MIC) Architecture provides 60 cores on chip and very wide 512-bit SIMD instructions, attractive for data intensive applications. This paper demonstrates how to leverage SIMD instructions and shared memory multiprocessing on MIC to perform Galois Field arithmetic. The experiments show that the performance of the computation is significantly enhanced.",
keywords = "Galois Field Arithmetic, MIC Architecture, OpenMP, SIMD, Speedup",
author = "Kai Feng and Wentao Ma and Wei Huang and Qing Zhang and Yili Gong",
year = "2013",
doi = "10.1007/978-3-642-40820-5_13",
language = "English",
isbn = "9783642408199",
series = "Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)",
pages = "143--154",
booktitle = "Network and Parallel Computing - 10th IFIP International Conference, NPC 2013, Proceedings",
note = "10th IFIP International Conference on Network and Parallel Computing, NPC 2013 ; Conference date: 19-09-2013 Through 21-09-2013",
}