Research on High-integrated Low-latency Superconducting Quantum Readout System

Superconducting quantum computing has gained significant attention for its ability to prepare a large number of qubits easily. However, the superconducting quantum readout systems, which serve as the foundation of superconducting quantum computing, still face several challenges including low integration, high computing delay, and reduced flexibility. In this paper, a highly integrated and low-latency superconducting readout system is introduced. This system, built on RFSoC chip, comprises multiple analog-to-digital and digital-to-analog conversion channels, as well as demodulation calculation units, to improve the degree of integration. The system employs a time-optimized single-channel matching filter demodulation algorithm to address the problem of high delay associated with readout systems, achieving a demodulation calculation delay of 19.2ns. Additionally, the system supports multiple quantum measurement and control experiments through the parameterization and modular design of functional modules. The actual test reveals that the qubit fidelity F00 and F11 obtained with this system can reach 99.5% and 98.6%, respectively, while the readout speed is significantly enhanced compared to software-based calculation. This system effectively improves the accuracy of quantum state readout.