@inproceedings{e19ce1b8473549d79565223877b658e0,
title = "Rapid preprocessing of FMCW Gb-SAR echo based on FPGA",
abstract = "To reduce the huge data-operation and transmission pressure in the slope-monitoring radar system, and make full use of the hardware resources in the Field-Programmable Gate Array (FPGA), this paper designs a rapid preprocessing system for echo data from the frequency-modulated continuous-wave (FMCW) ground-based synthetic aperture radar (GB-SAR). Thanks to the parallel processing capability and pipeline structure of FPGA, this system achieves coherent accumulation, filtering and pulse compression in the range dimension with the RAM/ROM and FFT IP core in ISE development platform. By this process, the signal-to-noise ratio (SNR) of the signal is improved significantly and the sidelobe of the pulse compression result in range dimension is suppressed effectively. Meanwhile, the completion of dechirp processing in FPGA reduces the operating pressure of Digital Signal Processor (DSP) and improve the system operating efficiency to a certain extent.",
keywords = "Dechirp Processing, FMCW, FPGA, Gb-SAR, Real-time Processing",
author = "Hesheng Pu and Pu Zefu and Weiming Tian and Cheng Hu",
note = "Publisher Copyright: {\textcopyright} 2017 IEEE.; 2017 IEEE International Conference on Imaging Systems and Techniques, IST 2017 ; Conference date: 18-10-2017 Through 20-10-2017",
year = "2017",
month = jul,
day = "1",
doi = "10.1109/IST.2017.8261516",
language = "English",
series = "IST 2017 - IEEE International Conference on Imaging Systems and Techniques, Proceedings",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "1--5",
booktitle = "IST 2017 - IEEE International Conference on Imaging Systems and Techniques, Proceedings",
address = "United States",
}