摘要
The overview and design of fully-digital transmitters based on pulse-width modulation (PWM) are clarified. By employing the parallel architecture with quadrature intermediate-frequency (IF) PWM and pre-corrected polar carrier-frequency (CF) PWM, a fully digital transmitter is proposed and designed in 180 nm CMOS, with wide CF and high modulation resolution. The presented PWMs are based on delay lines and multiplexers with the unit delay automatically calibrated. Inductive differential power combination with 2-level quadrature operation is proposed to accomplish the equivalent 3-level up-conversion for IF PWM. Piecewise-linearization correction technique is presented to ensure the envelope modulation fidelity for CF PWM. For 8PSK based EDGE baseband signals, the proposed transmitter achieves a wide CF range of 2 M–1.5 GHz and a low error vector magnitude less than 3%, with 20 dB spectrum optimized and higher modulation resolution in comparison to the existing designs. Excluding the power amplifiers, the presented implementation dissipates 120 μW from a 1.8 V power supply under the data rate of 270.833 kS/s or 812.5 kb/s, thus achieves the figure of merit of 0.44 nJ/S or 0.15 nJ/bit.
源语言 | 英语 |
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文章编号 | A005 |
页(从-至) | 293-302 |
页数 | 10 |
期刊 | Analog Integrated Circuits and Signal Processing |
卷 | 84 |
期 | 2 |
DOI | |
出版状态 | 已出版 - 1 8月 2015 |