摘要
To realize the function of the entire digital anti-jamming system in FPGA, hardware resources should be multiplexed. A complex floating point processing unit (CFPU), which has been designed and can simplify multiplex strategy when the algorithm was implemented in FPGA, used the less hardware resources and solved the problem of being lack of hardware resources. Simulation results show that CFPU and DSP TMS320C6713 almost get the same computation results in solving the same equation, CFPU with 92 MHz and 176 MHz has 53.5 and 78.0 times computation speed relative to TMS320C6713 with 200 MHz. Outdoor test shows that anti-jamming processor has good anti-jamming ability.
| 源语言 | 英语 |
|---|---|
| 页（从-至） | 299-303 |
| 页数 | 5 |
| 期刊 | Beijing Ligong Daxue Xuebao/Transaction of Beijing Institute of Technology |
| 卷 | 34 |
| 期 | 3 |
| 出版状态 | 已出版 - 3月 2014 |
指纹
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Wang, D. W., Li, J. Q., Wu, S. L., & Wang, J. (2014). Processor design for anti-jamming of satellite navigation based on FPGA. Beijing Ligong Daxue Xuebao/Transaction of Beijing Institute of Technology, 34(3), 299-303.