摘要
A low-power low-cost polar transmitter for EDGE is designed in 0.18μm CMOS. A differential delta-sigma modulator (DSM) tunes a three-terminal voltage-controlled oscillator (VCO) to perform RF phase modulation, where the VCO tuning curve is digitally pre-compensated for high linearity and the carrier frequency is calibrated by a dual-mode lowpower frequency-locked loop (FLL). A digital intermediate-frequency (IF) pulse-width5 modulator (PWM) drives a complementary power-switch followed by an LC filter to achieve envelope modulation with high efficiency. The proposed transmitter with 9mW power dissipation relaxes the time alignment between the phase and envelope modulations, and achieves an error vector magnitude (EVM) of 4% and phase noise of -123dBc/Hz at 400kHz offset frequency.
源语言 | 英语 |
---|---|
页(从-至) | 313-321 |
页数 | 9 |
期刊 | Journal of Semiconductor Technology and Science |
卷 | 14 |
期 | 3 |
DOI | |
出版状态 | 已出版 - 6月 2014 |