Multilevel converter with capacitor voltage actively balanced using reduced number of voltage sensors for high power applications

Congzhe Gao*, Xiangdong Liu, Jingyun Liu, Youguang Guo, Zhen Chen

*此作品的通讯作者

科研成果: 期刊稿件文章同行评审

9 引用 (Scopus)

摘要

Capacitor voltage balance control has attracted increasing attention in the studies of cascaded multilevel converters and modular multilevel converters. This study proposes a novel multilevel converter topology based on diode clamped half-bridge cascaded converter for medium/high voltage and high power applications. In this converter, capacitor voltage balancing using clamping diodes is achieved. Thus very little capacitor voltage control code has to be executed by the digital controller. Furthermore, only two voltage sensors are required for the capacitor voltage control, and the control scheme can be designed as simple as that of a two-level converter. The phase shifted pulse width modulation (PWM) method is employed for the converter, and a control strategy for the converter utilised as a static Var generator is presented. The proposed converter and control strategy were simulated with PSIM. Experiments were also carried out with a laboratory prototype. Results showed that the proposed converter topology with capacitor voltage balancing could work effectively. The applied PWM and control method were also validated.

源语言英语
页(从-至)1462-1473
页数12
期刊IET Power Electronics
9
7
DOI
出版状态已出版 - 8 6月 2016

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