TY - JOUR
T1 - Multilevel converter with capacitor voltage actively balanced using reduced number of voltage sensors for high power applications
AU - Gao, Congzhe
AU - Liu, Xiangdong
AU - Liu, Jingyun
AU - Guo, Youguang
AU - Chen, Zhen
N1 - Publisher Copyright:
© The Institution of Engineering and Technology.
PY - 2016/6/8
Y1 - 2016/6/8
N2 - Capacitor voltage balance control has attracted increasing attention in the studies of cascaded multilevel converters and modular multilevel converters. This study proposes a novel multilevel converter topology based on diode clamped half-bridge cascaded converter for medium/high voltage and high power applications. In this converter, capacitor voltage balancing using clamping diodes is achieved. Thus very little capacitor voltage control code has to be executed by the digital controller. Furthermore, only two voltage sensors are required for the capacitor voltage control, and the control scheme can be designed as simple as that of a two-level converter. The phase shifted pulse width modulation (PWM) method is employed for the converter, and a control strategy for the converter utilised as a static Var generator is presented. The proposed converter and control strategy were simulated with PSIM. Experiments were also carried out with a laboratory prototype. Results showed that the proposed converter topology with capacitor voltage balancing could work effectively. The applied PWM and control method were also validated.
AB - Capacitor voltage balance control has attracted increasing attention in the studies of cascaded multilevel converters and modular multilevel converters. This study proposes a novel multilevel converter topology based on diode clamped half-bridge cascaded converter for medium/high voltage and high power applications. In this converter, capacitor voltage balancing using clamping diodes is achieved. Thus very little capacitor voltage control code has to be executed by the digital controller. Furthermore, only two voltage sensors are required for the capacitor voltage control, and the control scheme can be designed as simple as that of a two-level converter. The phase shifted pulse width modulation (PWM) method is employed for the converter, and a control strategy for the converter utilised as a static Var generator is presented. The proposed converter and control strategy were simulated with PSIM. Experiments were also carried out with a laboratory prototype. Results showed that the proposed converter topology with capacitor voltage balancing could work effectively. The applied PWM and control method were also validated.
UR - http://www.scopus.com/inward/record.url?scp=84971613883&partnerID=8YFLogxK
U2 - 10.1049/iet-pel.2015.0073
DO - 10.1049/iet-pel.2015.0073
M3 - Article
AN - SCOPUS:84971613883
SN - 1755-4535
VL - 9
SP - 1462
EP - 1473
JO - IET Power Electronics
JF - IET Power Electronics
IS - 7
ER -