TY - JOUR
T1 - Design and Implementation of Spectrally Efficient Frequency Division Multiplexing Receiver
AU - Qi, Yuanjing
AU - Zhang, Tingting
AU - Feng, Yuan
AU - Qin, Zhen
AU - He, Dongxuan
N1 - Publisher Copyright:
© 2013 IEEE.
PY - 2023
Y1 - 2023
N2 - Compared to orthogonal frequency division multiplexing (OFDM), spectrally efficient frequency division multiplexing (SEFDM) provides higher spectrum efficiency, which has been regarded as a promising waveform for future wireless communications. Against this background, the design of SEFDM receiver is investigated in this paper, considering its sampling frequency synchronization (SFS), timing synchronization, phase recovery, and detector design. Specifically, a two-step SFS module, which consists of a coarse sampling frequency offset (SFO) compensation and a frequency domain zero-forcing based fine estimation, is proposed first. Next, a low-complexity timing synchronization scheme is designed to avoid excessive multipliers and look-up-tables. Furthermore, an SFO-based phase recovery is proposed, which shares the compensation and SFO estimation with SFS module, thus further reducing the complexity of SEFDM receiver. Moreover, the truncated singular value decomposition-fixed sphere decoder (TSVD-FSD) based detector has been studied to efficiently eliminate intercarrier interference. Simulation results demonstrate the superiority of our proposed SEFDM receiver, where the transmission rate can be improved by 25% at a loss of only 0.7dB bit error ratio compared to OFDM. Finally, field programmable gate array (FPGA) based implementation is carried out to verify the effectiveness of our proposed SEFDM receiver in practice.
AB - Compared to orthogonal frequency division multiplexing (OFDM), spectrally efficient frequency division multiplexing (SEFDM) provides higher spectrum efficiency, which has been regarded as a promising waveform for future wireless communications. Against this background, the design of SEFDM receiver is investigated in this paper, considering its sampling frequency synchronization (SFS), timing synchronization, phase recovery, and detector design. Specifically, a two-step SFS module, which consists of a coarse sampling frequency offset (SFO) compensation and a frequency domain zero-forcing based fine estimation, is proposed first. Next, a low-complexity timing synchronization scheme is designed to avoid excessive multipliers and look-up-tables. Furthermore, an SFO-based phase recovery is proposed, which shares the compensation and SFO estimation with SFS module, thus further reducing the complexity of SEFDM receiver. Moreover, the truncated singular value decomposition-fixed sphere decoder (TSVD-FSD) based detector has been studied to efficiently eliminate intercarrier interference. Simulation results demonstrate the superiority of our proposed SEFDM receiver, where the transmission rate can be improved by 25% at a loss of only 0.7dB bit error ratio compared to OFDM. Finally, field programmable gate array (FPGA) based implementation is carried out to verify the effectiveness of our proposed SEFDM receiver in practice.
KW - Spectrally efficient frequency division multiplexing (SEFDM)
KW - field programmable gate array (FPGA)
KW - low-complexity implementation structure
KW - sampling frequency synchronization (SFS)
UR - http://www.scopus.com/inward/record.url?scp=85176748669&partnerID=8YFLogxK
U2 - 10.1109/ACCESS.2023.3328234
DO - 10.1109/ACCESS.2023.3328234
M3 - Article
AN - SCOPUS:85176748669
SN - 2169-3536
VL - 11
SP - 121482
EP - 121491
JO - IEEE Access
JF - IEEE Access
ER -