TY - GEN
T1 - Design and Implementation of Image Compression Based on FPGA
AU - Liu, Bingrui
AU - Xie, Min
AU - Guan, Zihan
AU - Yang, Bolin
AU - Yang, Zehuan
N1 - Publisher Copyright:
© 2024 IEEE.
PY - 2024
Y1 - 2024
N2 - Image compression is an important research direction in the field of image processing, playing a crucial role in many fields such as mobile communication, cloud storage, and medical imaging. Currently, most hardware implementations of image compression are based on traditional image compression algorithms, such as JPEG. In order to improve the performance of image compression, this design proposes an image compression system based on Variational Auto-Encoder. Meanwhile, by using high-level synthesis tools, the optimized system can achieve image compression more quickly. The experimental results show that this design has certain improvements compared to JPEG2000 in terms of PSNR and MS-SSIM.
AB - Image compression is an important research direction in the field of image processing, playing a crucial role in many fields such as mobile communication, cloud storage, and medical imaging. Currently, most hardware implementations of image compression are based on traditional image compression algorithms, such as JPEG. In order to improve the performance of image compression, this design proposes an image compression system based on Variational Auto-Encoder. Meanwhile, by using high-level synthesis tools, the optimized system can achieve image compression more quickly. The experimental results show that this design has certain improvements compared to JPEG2000 in terms of PSNR and MS-SSIM.
KW - CNN
KW - FPGA
KW - Image compression
KW - Variational Auto-Encoder
UR - http://www.scopus.com/inward/record.url?scp=85199214998&partnerID=8YFLogxK
U2 - 10.1109/AINIT61980.2024.10581611
DO - 10.1109/AINIT61980.2024.10581611
M3 - Conference contribution
AN - SCOPUS:85199214998
T3 - 2024 5th International Seminar on Artificial Intelligence, Networking and Information Technology, AINIT 2024
SP - 1380
EP - 1384
BT - 2024 5th International Seminar on Artificial Intelligence, Networking and Information Technology, AINIT 2024
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 5th International Seminar on Artificial Intelligence, Networking and Information Technology, AINIT 2024
Y2 - 29 May 2024 through 31 May 2024
ER -