@inproceedings{8aa9a41022dc4fbd881715a6c0ffc705,
title = "Design and implementation of a CMOS 1Gsps 5bit flash ADC with offset calibration",
abstract = "A 1Gsps 5-bit Flash ADC is designed with offset calibration and fabricated in TSMC 0.18μm CMOS process. This design contains the basic Flash ADC circuit and offset calibration. To achieve a high speed sampling rate, preamplifier with latch is applied. And in order to reduce the offset which is caused by mismatch, a type of calibration with current trimming is analysed and realized. The results of chip test with calibration show that the SNDR reaches 29.6dB and the SFDR reaches 45.6dB under the input frequency of 39MHz with 1GHz sampling rate.",
keywords = "Flash ADC, Offset calibration, Preamplifier with latch",
author = "Li Shiwen and Dang Hua and Gao Peng and Gui Xiaoyan and Chen Zhiming and Wang Xinghua and Zhong Shunan",
year = "2013",
doi = "10.1109/GreenCom-iThings-CPSCom.2013.339",
language = "English",
isbn = "9780769550466",
series = "Proceedings - 2013 IEEE International Conference on Green Computing and Communications and IEEE Internet of Things and IEEE Cyber, Physical and Social Computing, GreenCom-iThings-CPSCom 2013",
pages = "1829--1833",
booktitle = "Proceedings - 2013 IEEE International Conference on Green Computing and Communications and IEEE Internet of Things and IEEE Cyber, Physical and Social Computing, GreenCom-iThings-CPSCom 2013",
note = "2013 IEEE International Conference on Green Computing and Communications and IEEE Internet of Things and IEEE Cyber, Physical and Social Computing, GreenCom-iThings-CPSCom 2013 ; Conference date: 20-08-2013 Through 23-08-2013",
}