TY - JOUR
T1 - A MEMS-based real-time structured light 3-D measuring architecture on FPGA
AU - Zhou, Wenbiao
AU - Jia, Yunfei
AU - Fan, Luyao
AU - Fan, Gongyu
AU - Lu, Fengchi
N1 - Publisher Copyright:
© The Author(s), under exclusive licence to Springer-Verlag GmbH Germany, part of Springer Nature 2024.
PY - 2024/5
Y1 - 2024/5
N2 - With its its ability to non-contact measure three-dimensional information of objects and its extremely high accuracy advantage in close range, structured light 3-D measurement is widely used in various fields. However, some application scenarios, such as measuring moving objects and performing measurements in confined spaces, impose requirements for high speed and miniaturization in structured light 3-D measurement. Therefore, we propose a real-time structured light 3-D measurement system on FPGA. This system employs a four-step phase-shifting method to compute wrapped phases, complemented Gray code for phase unwrapping, and a cubic polynomial fitting approach for calculating the 3-D coordinates of points. We have proposed the optimized pipeline structure for each module. We have also proposed an optimized on-chip buffer structure to further improve throughput. The 3-D measurement speed of the proposed method can reach 76.9 fps, when the clock frequency is 100 MHz, and the image size is 2448×2048.
AB - With its its ability to non-contact measure three-dimensional information of objects and its extremely high accuracy advantage in close range, structured light 3-D measurement is widely used in various fields. However, some application scenarios, such as measuring moving objects and performing measurements in confined spaces, impose requirements for high speed and miniaturization in structured light 3-D measurement. Therefore, we propose a real-time structured light 3-D measurement system on FPGA. This system employs a four-step phase-shifting method to compute wrapped phases, complemented Gray code for phase unwrapping, and a cubic polynomial fitting approach for calculating the 3-D coordinates of points. We have proposed the optimized pipeline structure for each module. We have also proposed an optimized on-chip buffer structure to further improve throughput. The 3-D measurement speed of the proposed method can reach 76.9 fps, when the clock frequency is 100 MHz, and the image size is 2448×2048.
KW - 3-D measurement
KW - FPGA
KW - Fringe projection profilometry
KW - MEMS-based structured light
UR - http://www.scopus.com/inward/record.url?scp=85193904055&partnerID=8YFLogxK
U2 - 10.1007/s11554-024-01477-x
DO - 10.1007/s11554-024-01477-x
M3 - Article
AN - SCOPUS:85193904055
SN - 1861-8200
VL - 21
JO - Journal of Real-Time Image Processing
JF - Journal of Real-Time Image Processing
IS - 3
M1 - 98
ER -