摘要
In this paper, we analyze the speedup formula, and expand the formula in detail. After discuss the timing problems of parallel computing, we give some designing rules, specially applied to HPEC (high-performance embedded computing) systems. Further analyzing the characteristics of HPEC system, a modular processing architecture is proposed. Due to the development of interconnection technologies, we design a type of hybrid PE (Processing Element) architecture, and describe the compositions of the PE. The implementation methods of the hybrid PE are described. An actual platform is established to certity the feasibility and performance of the system.
源语言 | 英语 |
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主期刊名 | 2010 2nd International Conference on Industrial Mechatronics and Automation, ICIMA 2010 |
页 | 256-259 |
页数 | 4 |
DOI | |
出版状态 | 已出版 - 2010 |
活动 | 2010 2nd International Conference on Industrial Mechatronics and Automation, ICIMA 2010 - Wuhan, 中国 期限: 30 5月 2010 → 31 5月 2010 |
出版系列
姓名 | ICIMA 2010 - 2010 2nd International Conference on Industrial Mechatronics and Automation |
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卷 | 2 |
会议
会议 | 2010 2nd International Conference on Industrial Mechatronics and Automation, ICIMA 2010 |
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国家/地区 | 中国 |
市 | Wuhan |
时期 | 30/05/10 → 31/05/10 |
指纹
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Deng, Y., & Long, T. (2010). A hybrid high-performance embedded processing system. 在 2010 2nd International Conference on Industrial Mechatronics and Automation, ICIMA 2010 (页码 256-259). 文章 5538322 (ICIMA 2010 - 2010 2nd International Conference on Industrial Mechatronics and Automation; 卷 2). https://doi.org/10.1109/ICINDMA.2010.5538322