TY - GEN
T1 - A High-Performance Storage System Based with Dual RAID Engine
AU - Liu, Jingyu
AU - Zhang, Jinrong
AU - Li, Juan
AU - Liu, Lu
N1 - Publisher Copyright:
© 2019, Springer Nature Switzerland AG.
PY - 2019
Y1 - 2019
N2 - With the advent of the 5G, more and more applications use cloud storage to store data. Data becomes the cornerstone of the development of smart society. At the same time, these data have the characteristics of uneven generation rate, large write demand and low read requirement. The dynamic change of load during data storage has new requirements for storage architecture. This paper proposes a storage system that allocates strips in real time based on current load changes. Based on the traditional RAID layout, a dual-engine based high-performance storage system (DSH) is proposed. This system uses software and hardware co-processing architecture to implement strip allocation and address calculation. The strip allocation functions using software and the verification algorithm is implemented by hardware transfer to the FPGA through PCIE. Through experimental analysis shows that the DSH algorithm has a great advantage in saving CPU computing resources and saving disk energy consumption in the dynamic load storage environment.
AB - With the advent of the 5G, more and more applications use cloud storage to store data. Data becomes the cornerstone of the development of smart society. At the same time, these data have the characteristics of uneven generation rate, large write demand and low read requirement. The dynamic change of load during data storage has new requirements for storage architecture. This paper proposes a storage system that allocates strips in real time based on current load changes. Based on the traditional RAID layout, a dual-engine based high-performance storage system (DSH) is proposed. This system uses software and hardware co-processing architecture to implement strip allocation and address calculation. The strip allocation functions using software and the verification algorithm is implemented by hardware transfer to the FPGA through PCIE. Through experimental analysis shows that the DSH algorithm has a great advantage in saving CPU computing resources and saving disk energy consumption in the dynamic load storage environment.
KW - Co-design
KW - Disk array
KW - Dynamic load
KW - Energy-efficient storage
UR - http://www.scopus.com/inward/record.url?scp=85076136805&partnerID=8YFLogxK
U2 - 10.1007/978-3-030-34139-8_6
DO - 10.1007/978-3-030-34139-8_6
M3 - Conference contribution
AN - SCOPUS:85076136805
SN - 9783030341381
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 53
EP - 62
BT - Smart Computing and Communication - 4th International Conference, SmartCom 2019, Proceedings
A2 - Qiu, Meikang
PB - Springer
T2 - 4th International Conference on Smart Computing and Communications, SmartCom 2019
Y2 - 11 October 2019 through 13 October 2019
ER -
