A high-performance scalable computing system for real-time signal processing applications

Xiongkui Zhang*, Guoman Liu, Meiguo Gao

*此作品的通讯作者

科研成果: 书/报告/会议事项章节会议稿件同行评审

19 引用 (Scopus)

摘要

The Department of Electronic Engineering of Beijing Institute of Technology is integrating emerging interconnect technologies with other high-performance technologies to meet the demanding requirement of future, real-time signal processing applications. For next-generation, scalable, modular and adaptable signal-processing system, a universal, flexible and high-performance signal processing module based on TMS320C6455 and RapidIO interconnect has been developed. The TMS320C6455 is the state-of-the-art fixed-point DSP from Texas Instruments with the computing-capability of 9600MIPS. RapidIO, a switched fabric technology for board-to-board and chip-to-chip interconnect, is for interconnecting heterogeneous computing nodes in a low-latency, high-throughput and traffic-manageable way. With this versatile module, massively parallel multi-DSP computing system is feasible. In this paper, a prototype of 3 modules with 12 TMS320C6455s aggregated by Serial RapidIO is introduced and an application of this computing system in radar jamming system is briefly covered.

源语言英语
主期刊名Proceedings - 1st International Congress on Image and Signal Processing, CISP 2008
556-560
页数5
DOI
出版状态已出版 - 2008
活动1st International Congress on Image and Signal Processing, CISP 2008 - Sanya, Hainan, 中国
期限: 27 5月 200830 5月 2008

出版系列

姓名Proceedings - 1st International Congress on Image and Signal Processing, CISP 2008
2

会议

会议1st International Congress on Image and Signal Processing, CISP 2008
国家/地区中国
Sanya, Hainan
时期27/05/0830/05/08

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