@inproceedings{9097a4f6900a4ec5b2ceb953b713e906,
title = "A high performance 3D interconnection network for many-core processors",
abstract = "As technology scales, interconnection has played an important role in improving performance and reducing power consumption of CMP. While most of studies are mainly focus on two-dimension (2D) interconnection. With the increase of cores, the traditional 2D network techniques are no longer efficient for many-core processors. Three-dimension (3D) interconnection appears as a promising solution in high performance and power efficient interconnects design. In this paper, we propose a low-diameter 3D interconnection network for many-core processors. In our network, long range links are used to replace multiple short links. The path between any two nodes is no more than 5 hops. All the designs are evaluated by using a cycle-accurate 3D network simulator, and integrated with the Orion power model for performance and power analysis. The results show up to 33.00% latency reduction and 24.39% energy reduction on average compared with canonical 3D mesh network.",
keywords = "3D stacking, Interconnection, Long range link, Many-core",
author = "Licheng Xue and Yujin Gao and Jibin Fu",
year = "2010",
doi = "10.1109/ICCET.2010.5486092",
language = "English",
isbn = "9781424463503",
series = "ICCET 2010 - 2010 International Conference on Computer Engineering and Technology, Proceedings",
pages = "V1383--V1387",
booktitle = "ICCET 2010 - 2010 International Conference on Computer Engineering and Technology, Proceedings",
note = "2010 2nd International Conference on Computer Engineering and Technology, ICCET 2010 ; Conference date: 16-04-2010 Through 18-04-2010",
}