TY - GEN
T1 - A CPLD-based design of pre-processing circuit in navigation computer
AU - Xiao, Xuan
AU - Fu, Mengyin
AU - Wang, Qingzhe
AU - Yang, Xin
PY - 2010
Y1 - 2010
N2 - In order to improve the processing speed of navigation computer, a CPLD-based design of preprocessing circuit is presented. The outputs of gyroscopes, accelerometers, odometer and GPS are pre-processed, and then exchanged with the signal processing circuit through a dual-port RAM. All the information pre-processing circuit is designed in the CPLD, which enables a more flexible using and simpler circuit composition.
AB - In order to improve the processing speed of navigation computer, a CPLD-based design of preprocessing circuit is presented. The outputs of gyroscopes, accelerometers, odometer and GPS are pre-processed, and then exchanged with the signal processing circuit through a dual-port RAM. All the information pre-processing circuit is designed in the CPLD, which enables a more flexible using and simpler circuit composition.
KW - CPLD
KW - Design
KW - Preprocessing circuit
UR - http://www.scopus.com/inward/record.url?scp=79952136835&partnerID=8YFLogxK
U2 - 10.1109/ISSCAA.2010.5632538
DO - 10.1109/ISSCAA.2010.5632538
M3 - Conference contribution
AN - SCOPUS:79952136835
SN - 9781424460441
T3 - ISSCAA2010 - 3rd International Symposium on Systems and Control in Aeronautics and Astronautics
SP - 483
EP - 486
BT - ISSCAA2010 - 3rd International Symposium on Systems and Control in Aeronautics and Astronautics
T2 - 3rd International Symposium on Systems and Control in Aeronautics and Astronautics, ISSCAA2010
Y2 - 8 June 2010 through 10 June 2010
ER -