A 66-dB SNDR, 8-μW analog front-end for ECG/EEG recording application

Chengying Chen, Liming Chen, Xinghua Wang, Feng Zhang

科研成果: 书/报告/会议事项章节会议稿件同行评审

6 引用 (Scopus)

摘要

For Electrocardiogram (ECG) and electroencephalogram (EEG) recording application, this paper proposes an extremely low-power, low-noise analog front-end (AFE). Based on fully-integrated, high-pass, low-noise amplifier and inverter-based, low-power 2nd Sigma-Delta modulator, large output swing, excellent power efficiency and noise performance are achieved. The circuit is implemented in 0.13μm 1P8M Mixed-signal technology. The measurement results show in 0.6V power supply, input referred noise is 3.976μVrms and the noise efficient factor (NEF) is 3.658. Max Signal-to-Noise and Distortion Ratio (SNDR) is 66.7dB with 8.4μw power consumption. Compared with previous work, our design has the maximum SNDR and signal bandwidth, which meets the requirement of ECG/EEG recording application.

源语言英语
主期刊名2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings
出版商Institute of Electrical and Electronics Engineers Inc.
ISBN(电子版)9781538648810
DOI
出版状态已出版 - 26 4月 2018
活动2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Florence, 意大利
期限: 27 5月 201830 5月 2018

出版系列

姓名Proceedings - IEEE International Symposium on Circuits and Systems
2018-May
ISSN(印刷版)0271-4310

会议

会议2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018
国家/地区意大利
Florence
时期27/05/1830/05/18

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