Word length Optimization Method for Radix-2k Fixed-Point Pipeline FFT Processors

Long Pang; Ao Li; Yinan Zhou; Chen Yang; Yizhuang Xie; He Chen

doi:10.1109/ICSIDP47821.2019.9173398

Word length Optimization Method for Radix-2^k Fixed-Point Pipeline FFT Processors

Long Pang, Ao Li, Yinan Zhou, Chen Yang, Yizhuang Xie, He Chen

School of Information and Electronics

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Citation (Scopus)

Abstract

In order to overcome the disadvantages of higher logic resource occupancy when implementing a radix-2^k fixed-point pipelined FFT processor with single-path delay feedback architecture, the word length optimization method is proposed. Under the premise of the output signal quantization noise ratio (SQNR) which needs to be achieved, the optimized word length required for each butterfly operation stage can be obtained by direct formula calculation based on theoretical derivation and mathematical modeling, providing the theoretical basis for the word length configuration for the implementation of the fixed-point pipelined FFT processor. Compared with some previous works, the fixed-point pipeline FFT processor realized with the proposed method has the advantages of lower storage resource occupation while ensuring the processing precision.

Original language	English
Title of host publication	ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781728123455
DOIs	https://doi.org/10.1109/ICSIDP47821.2019.9173398
Publication status	Published - Dec 2019
Event	2019 IEEE International Conference on Signal, Information and Data Processing, ICSIDP 2019 - Chongqing, China Duration: 11 Dec 2019 → 13 Dec 2019

Publication series

Name	ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019

Conference

Conference	2019 IEEE International Conference on Signal, Information and Data Processing, ICSIDP 2019
Country/Territory	China
City	Chongqing
Period	11/12/19 → 13/12/19

Keywords

fixed point
radix-2k pipelined FFT
signal quantization noise ratio
word length optimization

Access to Document

10.1109/ICSIDP47821.2019.9173398

Cite this

Pang, L., Li, A., Zhou, Y., Yang, C., Xie, Y., & Chen, H. (2019). Word length Optimization Method for Radix-2^k Fixed-Point Pipeline FFT Processors. In ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019 Article 9173398 (ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICSIDP47821.2019.9173398

Pang, Long ; Li, Ao ; Zhou, Yinan et al. / Word length Optimization Method for Radix-2^k Fixed-Point Pipeline FFT Processors. ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019. Institute of Electrical and Electronics Engineers Inc., 2019. (ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019).

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title = "Word length Optimization Method for Radix-2k Fixed-Point Pipeline FFT Processors",

abstract = "In order to overcome the disadvantages of higher logic resource occupancy when implementing a radix-2k fixed-point pipelined FFT processor with single-path delay feedback architecture, the word length optimization method is proposed. Under the premise of the output signal quantization noise ratio (SQNR) which needs to be achieved, the optimized word length required for each butterfly operation stage can be obtained by direct formula calculation based on theoretical derivation and mathematical modeling, providing the theoretical basis for the word length configuration for the implementation of the fixed-point pipelined FFT processor. Compared with some previous works, the fixed-point pipeline FFT processor realized with the proposed method has the advantages of lower storage resource occupation while ensuring the processing precision.",

keywords = "fixed point, radix-2k pipelined FFT, signal quantization noise ratio, word length optimization",

author = "Long Pang and Ao Li and Yinan Zhou and Chen Yang and Yizhuang Xie and He Chen",

note = "Publisher Copyright: {\textcopyright} 2019 IEEE.; 2019 IEEE International Conference on Signal, Information and Data Processing, ICSIDP 2019 ; Conference date: 11-12-2019 Through 13-12-2019",

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Pang, L, Li, A, Zhou, Y, Yang, C, Xie, Y & Chen, H 2019, Word length Optimization Method for Radix-2^k Fixed-Point Pipeline FFT Processors. in ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019., 9173398, ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019, Institute of Electrical and Electronics Engineers Inc., 2019 IEEE International Conference on Signal, Information and Data Processing, ICSIDP 2019, Chongqing, China, 11/12/19. https://doi.org/10.1109/ICSIDP47821.2019.9173398

Word length Optimization Method for Radix-2^k Fixed-Point Pipeline FFT Processors. / Pang, Long; Li, Ao; Zhou, Yinan et al.
ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019. Institute of Electrical and Electronics Engineers Inc., 2019. 9173398 (ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AB - In order to overcome the disadvantages of higher logic resource occupancy when implementing a radix-2k fixed-point pipelined FFT processor with single-path delay feedback architecture, the word length optimization method is proposed. Under the premise of the output signal quantization noise ratio (SQNR) which needs to be achieved, the optimized word length required for each butterfly operation stage can be obtained by direct formula calculation based on theoretical derivation and mathematical modeling, providing the theoretical basis for the word length configuration for the implementation of the fixed-point pipelined FFT processor. Compared with some previous works, the fixed-point pipeline FFT processor realized with the proposed method has the advantages of lower storage resource occupation while ensuring the processing precision.

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Pang L, Li A, Zhou Y, Yang C, Xie Y , Chen H. Word length Optimization Method for Radix-2^k Fixed-Point Pipeline FFT Processors. In ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019. Institute of Electrical and Electronics Engineers Inc. 2019. 9173398. (ICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019). doi: 10.1109/ICSIDP47821.2019.9173398