Abstract
Phase change memory (PCM) uses a phase change material that is non-volatile, higher density, lower energy, and has better scalability than other methods. The main problem with PCM materials is the cell write limitation. Recent studies have focused on optimizing the write operations and wear-leveling, but cannot prevent malicious attacks to rapidly wear the PCM cells. This paper presents a PCM wear-leveling method which divides the whole PCM memory into two levels with separate random mapping tables to convert the logical cell addresses into physical addresses. The random mapping tables are updated dynamically according to the write count thresholds. This method not only implements PCM wear-leveling, but also resists malicious wearing-out attacks. Tests show that This method improves the wear-leveling by up to 87.5% over three existing wear-leveling methods with a system performance loss of less than 6% and additional storage overhead of less than 1‰ of the whole memory size.
Original language | English |
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Pages (from-to) | 1208-1215 |
Number of pages | 8 |
Journal | Qinghua Daxue Xuebao/Journal of Tsinghua University |
Volume | 55 |
Issue number | 11 |
DOIs | |
Publication status | Published - 1 Nov 2015 |
Externally published | Yes |
Keywords
- Operating system
- Phase change memory
- Random mapping
- Wear-leveling