TY - JOUR
T1 - Space Vector Modulation with Common-Mode Voltage Elimination and Switching Frequency Minimization for Multilevel Converters
AU - Sun, Qingle
AU - Sharkh, Suleiman M.
AU - Wang, Zhifu
AU - Wang, Zeshang
AU - Shi, Guobiao
N1 - Publisher Copyright:
© 1986-2012 IEEE.
PY - 2024/7/1
Y1 - 2024/7/1
N2 - This article proposes novel space vector pulse width modulation strategies for multilevel converters to achieve two widely desired optimization objectives, common-mode voltage (CMV) elimination and switching frequency minimization (SFM). For CMV elimination, a new coordinate system that looks like the cropped version of the original abc frame is proposed, by which zero CMV can be ensured when the identified switching states are transformed from the new frame back into the original one. For SFM, a new approach is proposed to determine the optimal switching sequence, where a voltage reference point dwell mechanism is introduced such that the number of switching actions between adjacent switching periods is minimized by establishing its relationship with a unique variable, namely the number of level shifts. Furthermore, these two objectives can either be implemented independently or in combination to achieve SFM under the premise of CMV elimination, thus allowing the converter's redundancy to be fully exploited. Simulation and experimental results validate the proposed strategies.
AB - This article proposes novel space vector pulse width modulation strategies for multilevel converters to achieve two widely desired optimization objectives, common-mode voltage (CMV) elimination and switching frequency minimization (SFM). For CMV elimination, a new coordinate system that looks like the cropped version of the original abc frame is proposed, by which zero CMV can be ensured when the identified switching states are transformed from the new frame back into the original one. For SFM, a new approach is proposed to determine the optimal switching sequence, where a voltage reference point dwell mechanism is introduced such that the number of switching actions between adjacent switching periods is minimized by establishing its relationship with a unique variable, namely the number of level shifts. Furthermore, these two objectives can either be implemented independently or in combination to achieve SFM under the premise of CMV elimination, thus allowing the converter's redundancy to be fully exploited. Simulation and experimental results validate the proposed strategies.
KW - Common-mode voltage (CMV) elimination
KW - multilevel converter
KW - space vector pulse width modulation (SVPWM)
KW - switching frequency minimization (SFM)
UR - http://www.scopus.com/inward/record.url?scp=85189628094&partnerID=8YFLogxK
U2 - 10.1109/TPEL.2024.3384417
DO - 10.1109/TPEL.2024.3384417
M3 - Article
AN - SCOPUS:85189628094
SN - 0885-8993
VL - 39
SP - 7952
EP - 7967
JO - IEEE Transactions on Power Electronics
JF - IEEE Transactions on Power Electronics
IS - 7
ER -